Microchip Technology Inc 28C16AF-20I-TS, 28C16AF-20I-P, 28C16AF-20-VS, 28C16AF-20-TS, 28C16AF-20-P Datasheet

28C16A

16K (2K x 8) CMOS EEPROM

FEATURES

•Fast Read Access Time—150 ns

•CMOS Technology for Low Power Dissipation

-30 mA Active

-100 A Standby

• Fast Byte Write Time—200 s or 1 ms

•Data Retention >200 years

•High Endurance - Minimum 104 Erase/Write Cycles

•Automatic Write Operation

-Internal Control Timer

-Auto-Clear Before Write Operation

-On-Chip Address and Data Latches

•Data polling

•Chip Clear Operation

•Enhanced Data Protection

-VCC Detector

-Pulse Filter

-Write Inhibit

•Electronic Signature for Device Identification

•5-Volt-Only Operation

•Organized 2Kx8 JEDEC Standard Pinout

•24-pin Dual-In-Line Package

•32-pin PLCC Package

•28-pin Thin Small Outline Package (TSOP) 8x20mm

•28-pin Very Small Outline Package (VSOP) 8x13.4mm

•Available for Extended Temperature Ranges:

-Commercial: 0˚C to +70˚C

-Industrial: -40˚C to +85˚C

PACKAGE TYPES

A7	• 1		24	Vcc		A7	NC	NC	NU	Vcc	WE	NC
						4	3	2	1	32	31	30
A6	2		23	A8
					A6								A8
A5	3		22	A9		5						29
					A5	6						28	A9
A4	4		21	WE
					A4	7						27	NC
A3	5		20	OE					PLCC
		DIP			A3 8							26	NC
A2	6		19	A10
					A2 9							25	OE
A1	7		18	CE
					A1	10						24	A10
A0	8		17	I/O7	A0 11							23	CE
I/O0	9		16	I/O6	NC	12						22	I/O7
I/O1	10		15	I/O5	I/O0	13						21	I/O6
I/O2	11		14	I/O4		14	15	16	17	18	19	20
VSS	12		13	I/O3		I/O1	I/O2	Vss	NU	I/O3	I/O4	I/O5
	• Pin 1 indicator on PLCC on top of package
OE	1											28	A10
NC	2											27	CE
A9	3											26	I/07
A8	4											25	I/06
NC	5											24	I/05
WE	6				TSOP							23	I/04
Vcc	7											22	I/03
NC	8											21	Vss
NC	9											20	I/02
A7	10											19	I/01
A6	11											18	I/00
A5	12											17	A0
A4	13											16	A1
A3	14											15	A2
	OE	22								21		A10
	NC	23								20		CE
	A9	24								19		I/O7
	A8	25								18		I/O6
	NC	26			VSOP					17		I/O5
	WE	27								16		I/O4
	VCC	28								15		I/O3
	NC	1								14		VSS
	NC	2								13		I/O2
	A7	3								12		I/O1
	A6	4								11		I/O0
	A5	5								10		A0
	A4	6									9	A1
	A3	7									8	A2

DESCRIPTION

BLOCK DIAGRAM

	The Microchip Technology Inc. 28C16A is a CMOS 16K						I/O0	I/O7
	non-volatile electrically Erasable PROM. The 28C16A		VSS
	is accessed like a static RAM for the read or write				Data Protection
			VCC
	cycles without the need of external components. Dur-				Circuitry
			CE		Chip Enable/
	ing a “byte write”, the address and data are latched
			OE		Output Enable
	internally, freeing the microprocessor address and data				Control Logic
			WE	Auto Erase/Write		Data	Input/Output
	bus for other operations.	Following the initiation of
					Timing	Poll	Buffers
	write cycle, the device will go to a busy state and auto-			Program Voltage
	matically clear and write the latched data using an
					Generation
	internal control timer. To determine when a write cycle		A0		Y		Y Gating
	is complete, the 28C16A uses Data polling. Data poll-
					Decoder
				L
	ing allows the user to read the location last written to
				a
	when the write operation is complete. CMOS design			t
				c
	and processing enables this part to be used in systems			h	X		16K bit
				e
	where reduced power consumption and reliability are			s	Decoder		Cell Matrix
	required. A complete family of packages is offered to		A10
	provide the utmost flexibility in applications.
	1996 Microchip Technology Inc.						DS11125G-page 1

28C16A

1.0ELECTRICAL CHARACTERISTICS

1.1MAXIMUM RATINGS*

VCC and input voltages w.r.t. VSS .......			-0.6V to + 6.25V
Voltage on		w.r.t. VSS	-0.6V to +13.5V
	OE
Voltage on A9 w.r.t. VSS ......................			-0.6V to +13.5V
Output Voltage w.r.t. VSS ................			-0.6V to VCC+0.6V
Storage temperature ..........................			-65˚C to +125˚C
Ambient temp. with power applied .......			-50˚C to +95˚C

*Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.

TABLE 1-1: PIN FUNCTION TABLE

Name							Function
A0 - A10							Address Inputs
							Chip Enable
			CE
							Output Enable
		OE
							Write Enable
	WE
I/O0 - I/O7							Data Inputs/Outputs
VCC							+5V Power Supply
VSS							Ground
	NC						No Connect; No Internal Connection
	NU						Not Used; No External Connection is
							Allowed

TABLE 1-2:

READ/WRITE OPERATION DC CHARACTERISTICS

VCC = +5V ±10%

Commercial (C): Tamb =

0˚C

to

+70˚C

Industrial

(I): Tamb =

-40˚C

to

+85˚C

Parameter

Status

Symbol

Min

Max

Units

Conditions

Input Voltages

Logic ‘1’

VIH

2.0

VCC+1

V

Logic ‘0;

VIL

-0.1

0.8

V

Input Leakage

—

I LI

-10

10

A

VIN = -0.1V to VCC+1

Input Capacitance

—

C IN

—

10

pF

V IN = 0V; Tamb = 25˚C;

f = 1 MHz

Output Voltages

Logic ‘1’

VOH

2.4

V

IOH = -400 A

Logic ‘0’

VOL

0.45

V

IOL = 2.1 mA

Output Leakage

—

I LO

-10

10

A

VOUT = -0.1V to VCC+0.1V

Output Capacitance

—

C OUT

—

12

pF

V IN = 0V; Tamb = 25˚C;

f = 1 MHz

Power Supply Current,

TTL input

ICC

—

30

mA

f = 5 MHz (Note 1)

Active

VCC = 5.5V;

Power Supply Current,

TTL input

ICC(S)TTL

—

2

mA

= VIH (0˚C to +70˚C)

CE

Standby

TTL input

ICC(S)TTL

3

mA

CE

= VIH (-40˚C to +85˚C)

CMOS input

ICC(S)CMOS

100

A

= VCC-0.3 to VCC+1

CE

Note 1: AC power supply current above 5 MHz; 1 mA/MHz.

DS11125G-page 2

1996 Microchip Technology Inc.

28C16A

TABLE 1-3:

READ OPERATION AC CHARACTERISTICS

AC Testing Waveform:

VIH = 2.4V; VIL = 0.45V; VOH = 2.0V; Vol = 0.8V

Output Load:

1 TTL Load + 100pF

Input Rise and Fall Times: 20 ns

Ambient Temperature:

Commercial (C): Tamb

=

0˚C to +70˚0˚C

Industrial (I):

Tamb

=

-40˚C to +85˚C

Parameter

Sym

28C16A-15

28C16A-20

28C16A-25

Units

Conditions

Min

Max

Min

Max

Min

Max

Address to Output Delay

tACC

—

150

—

200

—

250

ns

OE

=

= VIL

CE

to Output Delay

tCE

—

150

—

200

—

250

ns

OE

= VIL

CE

to Output Delay

tOE

—

70

—

80

—

100

ns

CE

= VIL

OE

or

High to Output Float

tOFF

0

50

0

55

0

70

ns

CE

OE

Output Hold from

or

tOH

0

—

0

—

0

—

ns

CE

OE,

whichever occurs first

Endurance

—

1M

—

1M

—

1M

—

cycles

25

°C, Vcc =

5.0V, Block

Mode (Note)

Note: This parameter is not tested but guaranteed by characterization. For endurance estimates in a specific application, please consult the Total Endurance Model which can be obtained on our BBS or website.

FIGURE 1-1: READ WAVEFORMS

Address	VIH	Address Valid
	VIL
	VIH
CE	VIL
			tCE(2)
	VIH
OE						tOFF(1,3)
	VIL
				tOE(2)		tOH
	VOH					High Z
Data	High Z
	VOL					Valid Output

tACC

VIH

WE

VIL

Notes: (1) tOFF is specified for OE or CE, whichever occurs first

(2)OE may be delayed up to tCE - t OE after the falling edge of CE without impact on tCE

(3)This parameter is sampled and is not 100% tested

1996 Microchip Technology Inc.

DS11125G-page 3