27LV256
256K (32K x 8) Low-Voltage CMOS EPROM
FEATURES
•Wide voltage range 3.0V to 5.5V
•High speed performance
-200 ns access time available at 3.0V
•CMOS Technology for low power consumption
-8 mA Active current at 3.0V
-20 mA Active current at 5.5V
-100 A Standby current
•Factory programming available
•Auto-insertion-compatible plastic packages
•Auto ID aids automated programming
•Separate chip enable and output enable controls
•High speed “Express” programming algorithm
•Organized 32K x 8: JEDEC standard pinouts
-28-pin Dual-in-line package
-32-pin PLCC package
-28-pin SOIC package
-28-pin VSOP package
-Tape and reel
•Data Retention > 200 years
•Available for the following temperature ranges:
- |
Commercial: |
0˚C to +70˚C |
- |
Industrial: |
-40˚C to +85˚C |
DESCRIPTION
The Microchip Technology Inc. 27LV256 is a low voltage (3.0 volt) CMOS EPROM designed for battery powered applications. The device is organized as a 32K x 8 (32K-Byte) non-volatile memory product. The 27LV256 consumes only 8 mA maximum of active current during a 3.0 volt read operation therefore improving battery performance. This device is designed for very low voltage applications where conventional 5.0 volt only EPROMS can not be used. Accessing individual bytes from an address transition or from power-up (chip enable pin going low) is accomplished in less than 200 ns at 3.0V. This device allows systems designers the ability to use low voltage non-volatile memory with today’s' low voltage microprocessors and peripherals in battery powered applications.
A complete family of packages is offered to provide the most flexibility in applications. For surface mount applications, PLCC, VSOP or SOIC packaging is available. Tape and reel packaging is also available for PLCC or SOIC packages.
PACKAGE TYPES
PDIP |
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VPP |
• 1 |
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28 |
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VCC |
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A12 |
2 |
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27 |
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A14 |
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A7 |
3 |
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26 |
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A13 |
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A6 |
4 |
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25 |
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A8 |
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A5 |
5 |
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24 |
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A9 |
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A4 |
6 |
23 |
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A11 |
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A3 |
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OE |
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A2 |
8 |
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21 |
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A10 |
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A1 |
9 |
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20 |
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CE |
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A0 |
10 |
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19 |
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O7 |
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O0 |
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18 |
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O6 |
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O1 |
12 |
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17 |
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O5 |
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O2 |
13 |
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16 |
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O4 |
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VSS |
14 |
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15 |
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O3 |
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PLCC |
A7 |
A12 |
VPP |
NU |
Vcc |
A14 |
A13 |
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3 |
2 |
1 |
32 |
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30 |
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A6 |
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A8 |
A5 |
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28 |
A9 |
A4 |
7 |
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27LV256 |
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27 |
A11 |
A0 |
11 |
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23 |
CE |
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A3 |
8 |
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26 |
NC |
A2 |
9 |
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25 |
OE |
A1 |
10 |
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24 |
A10 |
NC |
12 |
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22 |
O7 |
O0 |
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21 |
O6 |
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15 |
16 |
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19 |
20 |
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O1 |
O2 |
VSS |
NU |
O3 |
O4 |
O5 |
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SOIC
VPP |
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1 |
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28 |
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VCC |
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A12 |
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2 |
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27 |
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A14 |
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A7 |
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3 |
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26 |
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A13 |
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A6 |
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A8 |
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A5 |
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5 |
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24 |
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A9 |
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A4 |
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6 |
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A11 |
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A3 |
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7 |
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OE |
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A2 |
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8 |
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21 |
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A10 |
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A1 |
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CE |
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A0 |
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10 |
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19 |
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O7 |
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O0 |
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11 |
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O6 |
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O1 |
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12 |
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17 |
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O5 |
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O2 |
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13 |
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16 |
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O4 |
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VSS |
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14 |
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15 |
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O3 |
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VSOP
OE |
22 |
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A11 |
23 |
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A9 |
24 |
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A8 |
25 |
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A13 |
26 |
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27LV256 |
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A14 |
27 |
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VCC |
28 |
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VPP |
1 |
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A12 |
2 |
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A7 |
3 |
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A6 |
4 |
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A5 |
5 |
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A4 |
6 |
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A3 |
7 |
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21 |
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A10 |
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20 |
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CE |
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19 |
O7 |
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18 |
O6 |
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17 |
O5 |
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16 |
O4 |
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15 |
O3 |
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14 |
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VSS |
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13 |
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O2 |
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12 |
O1 |
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11 |
O0 |
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10 |
A0 |
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9 |
A1 |
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8 |
A2 |
1996 Microchip Technology Inc. |
DS11020F-page 1 |
27LV256
1.0ELECTRICAL CHARACTERISTICS
1.1Maximum Ratings*
VCC and input voltages w.r.t. VSS ........ |
-0.6V to +7.25V |
VPP voltage w.r.t. VSS during |
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programming ......................................... |
-0.6V to +14V |
Voltage on A9 w.r.t. VSS ...................... |
-0.6V to +13.5V |
Output voltage w.r.t. VSS ............... |
-0.6V to VCC +1.0V |
Storage temperature .......................... |
-65˚C to +150˚C |
Ambient temp. with power applied ..... |
-65˚C to +125˚C |
*Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
TABLE 1-1: PIN FUNCTION TABLE
Name |
Function |
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A0-A14 |
Address Inputs |
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Chip Enable |
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CE |
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Output Enable |
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OE |
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VPP |
Programming Voltage |
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O0 - O7 |
Data Output |
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VCC |
+5V or +3V Power Supply |
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VSS |
Ground |
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NC |
No Connection; No Internal |
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Connection |
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NU |
Not Used; No External Connection Is |
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Allowed |
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TABLE 1-2: |
READ OPERATION DC CHARACTERISTICS |
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VCC = +5V ±10% or 3.0V where indicated |
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Commercial: |
Tamb = 0˚C to +70˚C |
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Industrial: |
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Tamb = -40˚C to +85˚C |
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Parameter |
Part* |
Status |
Symbol |
Min. |
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Max. |
Units |
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Conditions |
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Input Voltages |
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all |
Logic "1" |
VIH |
2.0 |
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VCC+1 |
V |
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Logic "0" |
VIL |
-0.5 |
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0.8 |
V |
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Input Leakage |
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all |
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ILI |
-10 |
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10 |
A |
VIN = 0 to VCC |
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Output Voltages |
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all |
Logic "1" |
VOH |
2.4 |
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V |
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IOH = -400 A |
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Logic "0" |
VOL |
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0.45 |
V |
IOL = 2.1 mA |
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Output Leakage |
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all |
— |
I LO |
-10 |
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10 |
A |
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VOUT = 0V to VCC |
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Input Capacitance |
all |
— |
C IN |
— |
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6 |
pF |
V IN = 0V; Tamb = 25°C; |
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f = 1 MHz |
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Output Capacitance |
all |
— |
C OUT |
— |
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12 |
pF |
V OUT = 0V; Tamb = 25°C; |
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f = 1 MHz |
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Power Supply Current, |
C |
TTL input |
ICC1 |
— |
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20 @ 5.0V |
mA |
VCC = 5.5V; VPP = VCC |
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Active |
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8 @ 3.0V |
mA |
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f = 1 MHz; |
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I |
TTL input |
ICC2 |
— |
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25 @ 5.0V |
mA |
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= |
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= VIL; |
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OE |
CE |
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10 @ 3.0V |
mA |
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IOUT = 0 mA; |
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VIL = -0.1 to 0.8V; |
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VIH = 2.0 to VCC; |
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Note 1 |
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Power Supply Current, |
C |
TTL input |
ICC(S) |
— |
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1 @ 3.0V |
mA |
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Standby |
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I |
TTL input |
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2 @ 3.0V |
mA |
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all |
CMOS input |
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100 @ 3.0V |
A |
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CE=VCC ± 0.2V |
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* Parts: C=Commercial Temperature Range I =Industrial Temperature Ranges
Note 1: Typical active current increases .75 mA per MHz up to operating frequency for all temperature ranges.
DS11020F-page 2 |
1996 Microchip Technology Inc. |
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27LV256 |
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TABLE 1-3: |
READ OPERATION AC CHARACTERISTICS |
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AC Testing Waveform: |
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VIH = 2.4V and VIL = 0.45V; VOH = 2.0V VOL = 0.8V |
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Output Load: |
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1 TTL Load + 100 pF |
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Input Rise and Fall Times: 10 ns |
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Ambient Temperature: |
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Commercial: |
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Tamb = 0˚C to +70˚C |
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Industrial: |
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Tamb = -40˚C to +85˚C |
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Parameter |
Sym |
27HC256-20 |
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27HC256-25 |
27HC256-30 |
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Units |
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Conditions |
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Min |
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Max |
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Min |
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Max |
Min |
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Max |
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Address to Output Delay |
tACC |
— |
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200 |
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— |
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250 |
— |
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300 |
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ns |
CE |
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= |
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= VIL |
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OE |
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to Output Delay |
tCE |
— |
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200 |
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— |
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250 |
— |
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300 |
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ns |
OE |
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= VIL |
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CE |
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to Output Delay |
tOE |
— |
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100 |
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— |
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125 |
— |
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125 |
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ns |
CE |
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= VIL |
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OE |
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or |
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to O/P High |
tOFF |
0 |
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50 |
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CE |
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OE, |
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whichever goes first |
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FIGURE 1-1: |
READ WAVEFORMS |
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VIH |
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VIL |
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VIH |
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CE |
VIL |
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tCE(2) |
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VIH |
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OE |
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tOFF(1,3) |
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tOH |
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Outputs |
VOH |
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High Z |
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O0 - O7 |
VOL |
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tACC |
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Notes: (1) tOFF is specified for OE or CE, whichever occurs first
(2)OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE
(3)This parameter is sampled and is not 100% tested.
1996 Microchip Technology Inc. |
DS11020F-page 3 |
27LV256
TABLE 1-4: PROGRAMMING DC CHARACTERISTICS
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Ambient Temperature: Tamb = 25°C ± 5°C |
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VCC = 6.5V ± 0.25V, VPP = 13.0V ± 0.25V |
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Parameter |
Status |
Symbol |
Min |
Max. |
Units |
Conditions |
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Input Voltages |
Logic”1” |
VIH |
2.0 |
VCC+1 |
V |
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Logic”0” |
VIL |
-0.1 |
0.8 |
V |
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Input Leakage |
— |
I LI |
-10 |
10 |
A |
VIN = 0V to VCC |
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Output Voltages |
Logic”1” |
VOH |
2.4 |
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V |
IOH = -400 A |
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Logic”0” |
VOL |
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0.45 |
V |
IOL = 2.1 mA |
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VCC Current, program & verify |
— |
I CC2 |
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20 |
mA |
Note 1 |
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VPP Current, program |
— |
I PP2 |
— |
25 |
mA |
Note 1 |
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A9 Product Identification |
— |
VH |
11.5 |
12.5 |
V |
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Note 1: VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP.
TABLE 1-5: PROGRAMMING AC CHARACTERISTICS |
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for Program, Program Verify |
AC Testing Waveform: |
VIH=2.4V and VIL=0.45V; VOH=2.0V; VOL=0.8V |
and Program Inhibit Modes |
Output Load: |
1 TLL Load + 100pF |
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Ambient Temperature: |
Tamb=25°C±5°C |
VCC= 6.5V ± 0.25V, VPP =13.0V ± 0.25V
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Parameter |
Symbol |
Min. |
Max. |
Units |
Remarks |
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Address Set-Up Time |
tAS |
2 |
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s |
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Data Set-Up Time |
tDS |
2 |
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s |
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Data Hold Time |
tDH |
2 |
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s |
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Address Hold Time |
tAH |
0 |
— |
s |
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Float Delay (2) |
tDF |
0 |
130 |
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VCC Set-Up Time |
tVCS |
2 |
— |
s |
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Program Pulse Width (1) |
tPW |
95 |
105 |
s |
100 s typical |
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Set-Up Time |
tCES |
2 |
— |
s |
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CE |
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Set-Up Time |
tOES |
2 |
— |
s |
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OE |
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VPP Set-Up Time |
tVPS |
2 |
— |
s |
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||||
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Data Valid from |
|
|
tOE |
— |
100 |
ns |
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||
|
OE |
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||||||||
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Note 1: For express algorithm, initial programming width tolerance is 100 s ±5%.
2:This parameter is only sampled and not 100% tested. Output float is defined as the point where data is no longer driven (see timing diagram).
DS11020F-page 4 |
1996 Microchip Technology Inc. |