Microchip Technology Inc 25LC640XT-I-ST, 25LC640XT-ST, 25LC640X-I-ST, 25LC640X-ST, 25LC640T-I-ST Datasheet

M25AA640/25LC640/25C640

64K SPI™ Bus Serial EEPROM

DEVICE SELECTION TABLE

Part	VCC	Max Clock	Temp
Number	Range	Frequency	Ranges
25AA640	1.8-5.5V	1 MHz	C,I
25LC640	2.5-5.5V	2 MHz	C,I
25C640	4.5-5.5V	3 MHz	C,I,E

FEATURES

•	Low power CMOS technology
	- Write current: 3 mA typical
	- Read current: 500 A typical
	- Standby current: 500 nA typical
• 8192 x 8 bit organization
•	32 byte page
• Write cycle time: 5ms max.
• Self-timed ERASE and WRITE cycles
•	Block write protection
	- Protect none, 1/4, 1/2, or all of array
• Built-in write protection
	- Power on/off data protection circuitry
	-	Write enable latch
	-	Write protect pin
•	Sequential read
•	High reliability
	- Endurance: 1M cycles (guaranteed)
	- Data retention: > 200 years
	-	ESD protection: > 4000 V
• 8-pin PDIP, SOIC, and TSSOP packages
•	Temperature ranges supported:		0°C to	+70°C
	-	Commercial: (C)
	-	Industrial: (I)	-40°C to	+85°C
	-	Automotive: (E) (25C640)	-40°C to +125°C

DESCRIPTION

The Microchip Technology Inc. 25AA640/25LC640/ 25C640 (25xx640*) is a 64K bit serial Electrically Erasable PROM. The memory is accessed via a simple Serial Peripheral Interface (SPI) compatible serial bus. The bus signals required are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device is controlled through a chip select (CS) input.

Communication to the device can be paused via the hold pin (HOLD). While the device is paused, transitions on its inputs will be ignored, with the exception of chip select, allowing the host to service higher priority interrupts.

PACKAGE TYPES

										PDIP/SOIC
				CS						1	25xx640	8			VCC
										2		7
			SO												HOLD
										3		6			SCK
			WP
		VSS								4		5			SI
											TSSOP
							1						8			SCK
	HOLD										25xx640
	VCC						2						7			SI
							3						6			VSS
		CS
	SO						4						5				WP

BLOCK DIAGRAM

	Status		HV Generator
	Register
			EEPROM
	I/O Control	Memory	X
		Control	Array
	Logic
		Logic	Dec
			Page Latches
	SI
	SO		Y Decoder
	CS
	SCK
	HOLD		Sense Amp.
			R/W Control
	WP
		VCC
		VSS

*25xx640 is used in this document as a generic part number for the 25AA640/25LC640/25C640 devices. SPI is a trademark of Motorola.

1997 Microchip Technology Inc.

Preliminary

DS21223A-page 1

25AA640/25LC640/25C640

1.0 ELECTRICAL	FIGURE 1-1: AC TEST CIRCUIT
CHARACTERISTICS	VCC

1.1Maximum Ratings*

Vcc		7.0V			2.25 K
All inputs and outputs w.r.t. Vss..................	-0.6V to Vcc+1.0V
Storage temperature .......................................		- 65˚C to 150˚C		SO
Ambient temperature under bias.....................		- 65˚C to 125˚C
Soldering temperature of leads (10 seconds)		+300˚C			1.8 K			100 pF
ESD protection on all pins.................................................		4kV
*Notice: Stresses above those listed under ‘Maximum ratings’ may
cause permanent damage to the device. This is a stress rating only and
functional operation of the device at those or any other conditions			1.2	AC Test Conditions
above those indicated in the operational listings of this specification is
not implied. Exposure to maximum rating conditions for an extended

period of time may affect device reliability

AC Waveform:

TABLE 1-1:

PIN FUNCTION TABLE

VLO = 0.2V

VHI = VCC - 0.2V

(Note 1)

Name

Function

VHI = 4.0V

(Note 2)

Chip Select Input

CS

Timing Measurement Reference Level

SO

Serial Data Output

Input

0.5 VCC

SI

Serial Data Input

Output

0.5 VCC

SCK

Serial Clock Input

Note 1: For VCC ≤ 4.0V

Write Protect Pin

WP

2: For VCC > 4.0V

VSS

Ground

VCC

Supply Voltage

Hold Input

HOLD

TABLE 1-2:

DC CHARACTERISTICS

All parameters apply over the

Commercial (C):

Tamb = 0°C to +70°C

VCC = 1.8V to 5.5V

specified operating ranges

Industrial (I):

Tamb = -40°C to +85°C

VCC = 1.8V to 5.5V

unless otherwise noted.

Automotive (E):

Tamb = -40°C to +125°C

VCC = 4.5V to 5.5V (25C640 only)

Parameter

Symbol

Min

Max

Units

Test Conditions

High level input voltage

VIH1

2.0

VCC+1

V

VCC ≥ 2.7V (Note)

VIH2

0.7 VCC

VCC+1

V

VCC< 2.7V (Note)

Low level input voltage

VIL1

-0.3

0.8

V

VCC ≥ 2.7V (Note)

VIL2

-0.3

0.3 VCC

V

VCC < 2.7V (Note)

Low level output voltage

VOL

—

0.4

V

IOL = 2.1 mA

VOL

—

0.2

V

IOL = 1.0 mA, VCC < 2.5V

High level output voltage

VOH

VCC -0.5

—

V

IOH =-400 A

Input leakage current

ILI

-10

10

A

= VCC, VIN = VSS TO VCC

CS

Output leakage current

ILO

-10

10

A

= VCC, VOUT = VSS TO VCC

CS

Internal Capacitance

CINT

—

7

pF

TAMB = 25˚C, CLK = 1.0 MHz,

(all inputs and outputs)

VCC = 5.0V (Note)

ICC Read

—

1

mA

VCC = 5.5V; FCLK=3.0 MHz; SO = Open

Operating Current

—

500

A

VCC = 2.5V; FCLK=2.0 MHz; SO = Open

ICC Write

—

5

mA

VCC= 5.5V

—

3

mA

VCC = 2.5V

Standby Current

ICCS

—

5

A

= Vcc = 5.5V, Inputs tied to VCC or VSS

CS

—

1

A

= Vcc = 2.5V, Inputs tied to VCC or VSS

CS

Note: This parameter is periodically sampled and not 100% tested.

DS21223A-page 2

Preliminary

1997 Microchip Technology Inc.

25AA640/25LC640/25C640

TABLE 1-3:				AC CHARACTERISTICS
	All parameters apply over the				Commercial (C):	Tamb = 0°C to +70°C			VCC = 1.8V to 5.5V
	specified operating ranges				Industrial (I):	Tamb = -40°C to +85°C			VCC = 1.8V to 5.5V
	unless otherwise noted.				Automotive (E):	Tamb = -40°C to +125°C			VCC = 4.5V to 5.5V (25C640 only)
			Parameter		Symbol	Min	Max		Units	Test Conditions
Clock Frequency					FCLK	—	3		MHz	VCC = 4.5V to 5.5V
						—	2		MHz	VCC = 2.5V to 4.5V
						—	1		MHz	VCC = 1.8V to 2.5V
		Setup Time			TCSS	100	—		ns	VCC = 4.5V to 5.5V
	CS
						250	—		ns	VCC = 2.5V to 4.5V
						500	—		ns	VCC = 1.8V to 2.5V
		Hold Time			TCSH	150	—		ns	VCC = 4.5V to 5.5V
	CS
						250	—		ns	VCC = 2.5V to 4.5V
						475	—		ns	VCC = 1.8V to 2.5V
		Disable Time			TCSD	500	—		ns
	CS
Data Setup Time					TSU	30	—		ns	VCC = 4.5V to 5.5V
						50	—		ns	VCC = 2.5V to 4.5V
						50	—		ns	VCC = 1.8V to 2.5V
	Data Hold Time				THD	50	—		ns	VCC = 4.5V to 5.5V
						100	—		ns	VCC = 2.5V to 4.5V
						100	—		ns	VCC = 1.8V to 2.5V
	CLK Rise Time				TR	—	2		s	(Note 1)
CLK Fall Time					TF	—	2		s	(Note 1)
Clock High Time					THI	150	—		ns	VCC = 4.5V to 5.5V
						250	—		ns	VCC = 2.5V to 4.5V
						475	—		ns	VCC = 1.8V to 2.5V
	Clock Low Time				TLO	150	—		ns	VCC = 4.5V to 5.5V
						250	—		ns	VCC = 2.5V to 4.5V
						475	—		ns	VCC = 1.8V to 2.5V
	Clock Delay Time				TCLD	50	—		ns
Clock Enable Time					TCLE	50	—		ns
Output Valid from					TV	—	150		ns	VCC = 4.5V to 5.5V
	Clock Low					—	250		ns	VCC = 2.5V to 4.5V
						—	475		ns	VCC = 1.8V to 2.5V
	Output Hold Time				THO	0	—		ns	(Note 1)
Output Disable Time					TDIS	—	200		ns	VCC = 4.5V to 5.5V (Note 1)
						—	250		ns	VCC = 2.5V to 4.5V (Note 1)
						—	500		ns	VCC = 1.8V to 2.5V (Note 1)
			Setup Time		THS	100	—		ns	VCC = 4.5V to 5.5V
	HOLD
						100	—		ns	VCC = 2.5V to 4.5V
						200	—		ns	VCC = 1.8V to 2.5V
			Hold Time		THH	100	—		ns	VCC = 4.5V to 5.5V
	HOLD
						100	—		ns	VCC = 2.5V to 4.5V
						200	—		ns	VCC = 1.8V to 2.5V
			Low to Output High-Z		THZ	100	—		ns	VCC = 4.5V to 5.5V (Note 1)
	HOLD
						150	—		ns	VCC = 2.5V to 4.5V (Note 1)
						200	—		ns	VCC = 1.8V to 2.5V (Note 1)
			High to Output Valid		THV	100	—		ns	VCC = 4.5V to 5.5V
	HOLD
						150	—		ns	VCC = 2.5V to 4.5V
						200	—		ns	VCC = 1.8V to 2.5V
	Internal Write Cycle Time				TWC	—	5		ms
Endurance					—	1M	—		E/W Cycles	(Note 2)

Note 1: This parameter is periodically sampled and not 100% tested.

2:This parameter is not tested but guaranteed by characterization. For endurance estimates in a specifi application, please consult the Total Endurance Model which can be obtained on Microchip’s BBS or website.

1997 Microchip Technology Inc.

Preliminary

DS21223A-page 3

25AA640/25LC640/25C640
FIGURE 1-2: HOLD TIMING
CS
		THS	THH	THS	THH
SCK
			THZ	THV
SO	n+2	n+1	high impedance		n	n-1
			n
					TSU
SI	n+2	n+1	don’t care		n	n-1
			n
HOLD
FIGURE 1-3:	SERIAL INPUT TIMING

				TCSD
CS				TCLE
		TCSS	TR	TCLD
			TF	TCSH
	Mode 1,1
SCK	Mode 0,0
	Tsu		THD
SI		MSB in		LSB in
SO			high impedance
FIGURE 1-4: SERIAL OUTPUT TIMING
CS

	THI	TLO	TCSH
			Mode 1,1
SCK			Mode 0,0
	TV		TDIS
			THO
SO	MSB out		LSB out
SI			don’t care

DS21223A-page 4

Preliminary

1997 Microchip Technology Inc.