a |
Monolithic Peak Detector |
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with Reset-and-Hold Mode |
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PKD01 |
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FEATURES
Monolithic Design for Reliability and Low Cost High Slew Rate: 0.5 V/ s
Low Droop Rate
TA = 25 C: 0.1 mV/ms
TA = 125 C: 10 mV/ms
Low Zero-Scale Error: 4 mV
Digitally Selected Hold and Reset Modes Reset to Positive or Negative Voltage Levels Logic Signals TTL and CMOS Compatible Uncommitted Comparator On-Chip Available in Die Form
GENERAL DESCRIPTION
The PKD01 tracks an analog input signal until a maximum amplitude is reached. The maximum value is then retained as a peak voltage on a hold capacitor. Being a monolithic circuit, the PKD01 offers significant performance and package density advantages over hybrid modules and discrete designs without sacrificing system versatility. The matching characteristics attained in a monolithic circuit provide inherent advantages when charge injection and droop rate error reduction are primary goals.
Innovative design techniques maximize the advantages of monolithic technology. Transconductance (gm) amplifiers were chosen over conventional voltage amplifier circuit building blocks. The gm amplifiers simplify internal frequency compensation, minimize acquisition time and maximize circuit accuracy. Their outputs are easily switched by low glitch current steering circuits. The steered outputs are clamped to reduce charge injection errors upon entering the hold mode or exiting the reset mode. The inherently low zero-scale error is further reduced by active Zener-Zap trimming to optimize overall accuracy.
FUNCTIONAL BLOCK DIAGRAM
+IN –IN |
OUTPUT V+ |
V– |
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– |
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CMP |
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+ |
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LOGIC |
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V– |
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GND |
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OUTPUT |
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DET |
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BUFFER |
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GATED |
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– |
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–IN |
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– |
"gm" |
D1 |
C |
OUTPUT |
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AMP |
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+ |
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+ |
A |
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+IN |
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GATED |
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–IN |
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– |
"gm" |
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AMP |
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+ |
B |
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+IN |
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PKD01 |
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RST |
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RST |
DET |
OPERATIONAL MODE |
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CH |
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0 |
0 |
PEAK DETECT |
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0 |
1 |
PEAK HOLD |
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1 |
1 |
RESET |
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SWITCHES SHOWN FOR: |
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1 |
0 |
INDETERMINATE |
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RST = “0,” DET = “0” |
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The output buffer amplifier features an FET input stage to reduce droop rate error during lengthy peak hold periods. A bias current cancellation circuit minimizes droop error at high ambient temperatures.
Through the DET control pin, new peaks may either be detected or ignored. Detected peaks are presented as positive output levels. Positive or negative peaks may be detected without additional active circuits, since Amplifier A can operate as an inverting or noninverting gain stage.
An uncommitted comparator provides many application options. Status indication and logic shaping/shifting are typical examples.
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 |
World Wide Web Site: http://www.analog.com |
Fax: 781/326-8703 |
© Analog Devices, Inc., 2001 |
PKD01–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (@ VS = 15 V, CH = 1000 pF, TA = 25 C, unless otherwise noted.)
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PKD01A/E |
PKD01F |
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Parameter |
Symbol |
Conditions |
Min |
Typ |
Max |
Min |
Typ |
Max |
Unit |
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gm AMPLIFIERS A, B |
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Zero-Scale Error |
VZS |
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2 |
4 |
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3 |
7 |
mV |
Input Offset Voltage |
VOS |
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2 |
3 |
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3 |
6 |
mV |
Input Bias Current |
IB |
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80 |
150 |
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80 |
250 |
nA |
Input Offset Current |
IOS |
RL = 10 kΩ, VO = ± 10 V |
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20 |
40 |
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20 |
75 |
nA |
Voltage Gain |
AV |
18 |
25 |
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10 |
25 |
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V/mV |
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Open-Loop Bandwidth |
BW |
AV = 1 |
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0.4 |
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0.4 |
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MHz |
Common-Mode Rejection Ratio |
CMRR |
–10 V ≤ VCM ≤ +10 V |
80 |
90 |
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74 |
90 |
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dB |
Power Supply Rejection Ratio |
PSRR |
± 9 V ≤ VS ≤ ±18 V |
86 |
96 |
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76 |
96 |
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dB |
Input Voltage Range1 |
VCM |
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± 10 |
± 11 |
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± 10 |
± 11 |
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V |
Slew Rate |
SR |
∆VIN = 20 V, DET = 1, RST = 0 |
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0.5 |
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0.5 |
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V/µs |
Feedthrough Error1 |
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66 |
80 |
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66 |
80 |
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dB |
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Acquisition Time to |
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µs |
0.1% Accuracy1 |
tAQ |
20 V Step, AVCL = +1 |
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41 |
70 |
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41 |
70 |
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Acquisition Time to |
tAQ |
20 V Step, AVCL = +1 |
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45 |
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45 |
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µs |
0.01% Accuracy1 |
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COMPARATOR |
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Input Offset Voltage |
VOS |
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0.5 |
1.5 |
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1 |
3 |
mV |
Input Bias Current |
IB |
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700 |
1000 |
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700 |
1000 |
nA |
Input Offset Current |
IOS |
2 kΩ Pull-Up Resistor to 5 V |
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75 |
300 |
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75 |
300 |
nA |
Voltage Gain |
AV |
5 |
7.5 |
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3.5 |
7.5 |
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V/mV |
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Common-Mode Rejection Ratio |
CMRR |
–10 V ≤ VCM ≤ +10 V |
82 |
106 |
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82 |
106 |
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dB |
Power Supply Rejection Ratio |
PSRR |
± 9 V ≤ VS ≤ ±18 V |
76 |
90 |
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76 |
90 |
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dB |
Input Voltage Range1 |
VCM |
ISINK ≤ 5 mA, Logic GND = 0 V |
± 11.5 |
± 12.5 |
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± 11.5 |
± 12.5 |
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V |
Low Output Voltage |
VOL |
–0.2 |
+0.15 +0.4 |
–0.2 |
+0.15 |
+0.4 |
V |
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“OFF” Output Leakage Current |
IL |
VOUT = 5 V |
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25 |
80 |
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25 |
80 |
µA |
Output Short-Circuit Current |
ISC |
VOUT = 5 V |
7 |
12 |
45 |
7 |
12 |
45 |
mA |
Response Time2 |
tS |
5 mV Overdrive, 2 kΩ Pull-Up |
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150 |
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150 |
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ns |
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Resistor to 5 V |
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DIGITAL INPUTS – RST, DET2 |
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Logic “1” Input Voltage |
VH |
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2 |
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2 |
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V |
Logic “0” Input Voltage |
VL |
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0.8 |
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0.8 |
V |
Logic “1” Input Current |
IINH |
VH = 3.5 V |
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0.02 |
1 |
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0.02 |
1 |
µA |
Logic “0” Input Current |
IINL |
VL = 0.4 V |
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1.6 |
10 |
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1.6 |
10 |
µA |
MISCELLANEOUS |
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TJ = 25°C |
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Droop Rate3 |
VDR |
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0.01 |
0.07 |
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0.01 |
0.1 |
mV/ms |
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Output Voltage Swing: |
VOP |
TA = 25°C |
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0.02 |
0.15 |
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0.03 |
0.20 |
mV/ms |
DET = 1 |
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Amplifier C |
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RL = 2.5 kΩ |
± 11.5 |
± 12.5 |
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± 11 |
± 12 |
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V |
Short-Circuit Current: |
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Amplifier C |
ISC |
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7 |
15 |
40 |
7 |
15 |
40 |
mA |
Switch Aperture Time |
tAP |
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75 |
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75 |
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ns |
Switch Switching Time |
ts |
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50 |
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50 |
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ns |
Slew Rate: Amplifier C |
SR |
RL = 2.5 kΩ |
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2.5 |
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2.5 |
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V/µs |
Power Supply Current |
ISY |
No Load |
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5 |
7 |
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6 |
9 |
mA |
NOTES
1Guaranteed by design.
2DET = 1, RST = 0.
3Due to limited production test times, the droop current corresponds to junction temperature (TJ). The droop current vs. time (after power-on) curve clarified this point. Since most devices (in use) are on for more than 1 second, ADI specifies droop rate for ambient temperature (TA) also. The warmed-up (TA) droop current specification is correlated to the junction temperature (TJ) value. ADI has a droop current cancellation circuit that minimizes droop current at high temperature. Ambient (TA) temperature specifications are not subject to production testing.
Specifications subject to change without notice.
–2– |
REV. A |
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PKD01 |
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(@ VS = 15 V, CH = 1000 pF, –55 C ≤ TA ≤ +125 C for PKD01AY, –25 C ≤ TA ≤ +85 C for |
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ELECTRICAL CHARACTERISTICS PKD01EY, PKD01FY and 0 C ≤ TA ≤ +70 C for PKD01EP, PKD01FP, unless otherwise noted.) |
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PKD01A/E |
PKD01F |
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Parameter |
Symbol |
Conditions |
Min |
Typ |
Max |
Min |
Typ |
Max |
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Unit |
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“gm” AMPLIFIERS A, B |
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Zero-Scale Error |
VZS |
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4 |
7 |
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6 |
12 |
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mV |
Input Offset Voltage |
VOS |
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3 |
6 |
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5 |
10 |
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mV |
Average Input Offset Drift1 |
TCVOS |
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–9 |
–24 |
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–9 |
–24 |
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µV/°C |
Input Bias Current |
IB |
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160 |
250 |
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160 |
500 |
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nA |
Input Offset Current |
IOS |
RL = 10 kΩ, VO = ± 10 V |
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30 |
100 |
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30 |
150 |
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nA |
Voltage Gain |
AV |
7.5 |
9 |
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5 |
9 |
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V/mV |
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Common-Mode Rejection Ratio |
CMRR |
–10 V ≤ VCM ≤ +10 V |
74 |
82 |
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72 |
80 |
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dB |
Power Supply Rejection Ratio |
PSRR |
± 9 V ≤ VS ≤ ± 18 V |
80 |
90 |
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70 |
90 |
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dB |
Input Voltage Range1 |
VCM |
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± 10 |
± 11 |
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± 10 |
± 11 |
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V |
Slew Rate |
SR |
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0.4 |
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0.4 |
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V/µs |
Acquisition Time to 0.1% Accuracy1 |
tAQ |
20 V Step, AVCL = +1 |
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60 |
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60 |
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µs |
COMPARATOR |
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Input Offset Voltage |
VOS |
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2 |
2.5 |
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2 |
5 |
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mV |
Average Input Offset Drift1 |
TCVOS |
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–4 |
–6 |
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–4 |
–6 |
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µV/°C |
Input Bias Current |
IB |
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1000 |
2000 |
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1100 |
2000 |
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nA |
Input Offset Current |
IOS |
2 kΩ Pull-Up Resistor to 5 V |
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100 |
600 |
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100 |
600 |
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nA |
Voltage Gain |
AV |
4 |
6.5 |
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2.5 |
6.5 |
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V/mV |
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Common-Mode Rejection Ratio |
CMRR |
–10 V ≤ VCM ≤ +10 V |
80 |
100 |
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80 |
92 |
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dB |
Power Supply Rejection Ratio |
PSRR |
± 9 V ≤ VS ≤ ± 18 V |
72 |
82 |
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72 |
86 |
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dB |
Input Voltage Range1 |
VCM |
ISINK ≤ 5 mA, Logic GND = 0 V |
± 11 |
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± 11 |
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V |
Low Output Voltage |
VOL |
–0.2 |
+0.15 |
+0.4 |
–0.2 |
+0.15 |
+0.4 |
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V |
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OFF Output Leakage Current |
IL |
VOUT = 5 V |
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25 |
100 |
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100 |
180 |
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µA |
Output Short-Circuit Current |
ISC |
VOUT = 5 V |
6 |
10 |
45 |
6 |
10 |
45 |
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mA |
Response Time |
tS |
5 mV Overdrive, 2 kΩ Pull-Up |
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Resistor to 5 V |
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200 |
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200 |
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ns |
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DIGITAL INPUTS – RST, DET2 |
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Logic “1” Input Voltage |
VH |
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2 |
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2 |
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V |
Logic “0” Input Voltage |
VL |
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0.8 |
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0.8 |
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V |
Logic “1” Input Current |
IINH |
VH = 3.5 V |
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0.02 |
1 |
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0.02 |
1 |
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µA |
Logic “0” Input Current |
IINL |
VL = 0.4 V |
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2.5 |
15 |
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2.5 |
15 |
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µA |
MISCELLANEOUS |
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Droop Rate3 |
VDR |
TJ = Max Operating Temp. |
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1.2 |
10 |
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3 |
15 |
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mV/ms |
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TA = Max Operating Temp. |
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DET = 1 |
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2.4 |
20 |
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6 |
20 |
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mV/ms |
Output Voltage Swing |
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RL = 2.5 kΩ |
± 11 |
± 12 |
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± 10.5 |
± 12 |
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Amplifier C |
VOP |
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V |
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Short-Circuit Current |
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Amplifier C |
ISC |
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6 |
12 |
40 |
6 |
12 |
40 |
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mA |
Switch Aperture Time |
tAP |
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75 |
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75 |
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ns |
Slew Rate: Amplifier C |
SR |
RL = 2.5 kΩ |
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2 |
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2 |
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V/µs |
Power Supply Current |
ISY |
No Load |
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5.5 |
8 |
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6.5 |
10 |
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mA |
NOTES
1Guaranteed by design.
2DET = 1, RST = 0.
3Due to limited production test times, the droop current corresponds to junction temperature (T J ). The droop current vs. time (after power-on) curve clarifies this point. Since most devices (in use) are on for more than 1 second, ADI specifies droop rate for ambient temperature (T A ) also. The warmed-up (TA ) droop current specification is correlated to the junction temperature (TJ) value. ADI has a droop current cancellation circuit that minimizes droop current at high temperature. Ambient (TA ) temperature specifications are not subject to production testing.
Specifications subject to change without notice.
REV. A |
–3– |
PKD01
ABSOLUTE MAXIMUM RATINGS1, 2 |
±18 V |
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Supply Voltage . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . |
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Input Voltage . . . . . . . . . . . . . . . . . . . |
Equal to Supply Voltage |
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Logic and Logic Ground |
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Voltage . . . . . . . . . . . . . . . . . . . . . . |
Equal to Supply Voltage |
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Output Short-Circuit Duration . . . . . . |
. . . . . . . . . . |
Indefinite |
Amplifier A or B Differential Input Voltage . . . . . . . . |
. . ±24 V |
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Comparator Differential Input Voltage |
. . . . . . . . . . . |
. . ±24 V |
Comparator Output Voltage |
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. . . . . . . . . . . . . . . . . . . . . . Equal to Positive Supply Voltage |
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Hold Capacitor Short-Circuit Duration |
. . . . . . . . . . |
Indefinite |
Lead Temperature (Soldering, 60 sec) |
. . . . . . . . . . . |
. . 300°C |
Storage Temperature Range |
. . . . . –65°C to +150°C |
PKD01AY, PKD01EY, PKD01FY |
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PKD01EP, PKD01FP . . . . . . . . . . |
. . . . . –65°C to +125°C |
Operating Temperature Range |
–55°C to +125°C |
PKD01AY . . . . . . . . . . . . . . . . . . . |
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PKD01EY, PKD01FY . . . . . . . . . . |
. . . . . . –25°C to +85°C |
PKD01EP, PKD01FP . . . . . . . . . . |
. . . . . . . . . 0°C to 70°C |
Junction Temperature . . . . . . . . . . . . |
. . . . . –65°C to +150°C |
NOTES
1Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted.
2Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
THERMAL CHARACTERISTICS
Package Type |
JA* |
JC |
Unit |
14-Lead Hermetic DIP (Y) |
99 |
12 |
°C/W |
14-Lead Plastic DIP (P) |
76 |
33 |
°C/W |
*θJA is specified for worst-case mounting conditions, i.e., θJA is specified for device in socket for cerdip and PDIP packages.
ORDERING GUIDE1
Model2 |
Temperature |
Package |
Package |
Range |
Description |
Option |
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PKD01AY |
–55°C to +85°C |
Cerdip |
Q-14 |
PKD01EY |
–25°C to +85°C |
Cerdip |
Q-14 |
PKD01FY |
–25°C to +85°C |
Cerdip |
Q-14 |
PKD01EP |
0°C to 70°C |
Plastic DIP |
N-14 |
PKD01FP |
0°C to 70°C |
Plastic DIP |
N-14 |
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NOTES
1Burn-in is available on commercial and industrial temperature range parts in cerdip, plastic DIP, and TO-can packages.
2For devices processed in total compliance to MIL-STD-883, add /883 after part number. Consult factory for 883 data sheet.
PIN CONFIGURATION
RST |
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DET |
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V+ |
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LOGIC GND |
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OUTPUT |
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PKD01 |
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COMP OUT |
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CH |
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–IN C |
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–IN A |
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+IN C |
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+IN A |
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–IN B |
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V– |
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+IN B |
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CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the PKD01 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
DICE CHARACTERISTICS
–4– |
REV. A |
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PKD01 |
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WAFER TEST LIMITS (@ VS = 15 V, CH = 1000 pF, TA = 25 C, unless otherwise noted.) |
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PKD01N |
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Parameter |
Symbol |
Conditions |
Limit |
Unit |
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“gm” AMPLIFIERS A, B |
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7 |
mV max |
Zero-Scale Error |
VZS |
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Input Offset Voltage |
VOS |
|
6 |
mV max |
Input Bias Current |
IB |
|
250 |
nA max |
Input Offset Current |
IOS |
RL = 10 kΩ, VO = ±10 V |
75 |
nA max |
Voltage Gain |
AV |
10 |
V/mV min |
|
Common-Mode Rejection Ratio |
CMRR |
–10 V ≤ VCM ≤ +10 V |
74 |
dB min |
Power Supply Rejection Ratio |
PSRR |
± 9 V ≤ VS ≤ ±18 V |
76 |
dB min |
Input Voltage Range1 |
VCM |
∆VIN = 20 V, DET = 1, RST = 0 |
± 11.5 |
V min |
Feedthrough Error |
|
66 |
dB min |
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COMPARATOR |
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Input Offset Voltage |
VOS |
|
3 |
mV max |
Input Bias Current |
IB |
|
1000 |
nA max |
Input Offset Current |
IOS |
2 kΩ Pull-Up Resistor to 5 V |
300 |
nA max |
Voltage Gain1 |
AV |
3.5 |
V/mV min |
|
Common-Mode Rejection Ratio |
CMRR |
–10 V ≤ VCM ≤ +10 V |
82 |
dB min |
Power Supply Rejection Ratio |
PSRR |
± 9 V ≤ VS ≤ ±18 V |
76 |
dB min |
Input Voltage Range1 |
VCM |
ISINK ≤ 5 mA, Logic GND = 5 V |
± 11.5 |
V min |
Low Output Voltage |
VOL |
0.4 |
V max |
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–0.2 |
V min |
“OFF” Output Leakage Current |
IL |
VOUT = 5 V |
80 |
µA max |
Output Short-Circuit Current |
ISC |
VOUT = 5 V |
45 |
mA min |
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7 |
mA min |
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DIGITAL INPUTS–RST, DET2 |
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Logic “1” Input Voltage |
VH |
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2 |
V min |
Logic “0” Input Voltage |
VL |
|
0.8 |
V max |
Logic “1” Input Current |
IINH |
VH = 3.5 V |
1 |
µA max |
Logic “0” Input Current |
IINL |
VL = 0.4 V |
10 |
µA max |
MISCELLANEOUS |
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TJ = 25°C, |
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Droop Rate3 |
VDR |
0.1 |
mV/ms max |
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TA = 25°C |
0.20 |
mV/ms max |
Output Voltage Swing Amplifier C |
VOP |
RL = 2.5 kΩ |
± 11 |
V min |
Short-Circuit Current Amplifier C |
ISC |
|
40 |
mA max |
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7 |
mA min |
Power Supply Current |
ISY |
No Load |
9 |
mA max |
gm AMPLIFIERS A, B |
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V/µs |
Slew Rate |
SR |
|
0.5 |
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Acquisition Time1 |
tA |
0.1% Accuracy, 20 V Step, AVCL = 1 |
41 |
µs |
|
tA |
0.01% Accuracy, 20 V Step, AVCL = 1 |
45 |
µs |
COMPARATOR |
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5 mV Overdrive, 2 kΩ Pull-Up Resistor to 5 V |
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Response Time |
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150 |
ns |
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MISCELLANEOUS |
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Switch Aperture Time |
tAP |
|
75 |
ns |
Switching Time |
tS |
|
50 |
ns |
Buffer Slew Rate |
SR |
RL = 2.5 kΩ |
2.5 |
V/µs |
NOTES
1Guaranteed by design.
2DET = 1, RST = 0.
3Due to limited production test times, the droop current corresponds to junction temperature (T J). The droop current vs. time (after power-on) curve clarifies this point. Since most devices (in use) are on for more than 1 second, ADI specifies droop rate for ambient temperature (T A) also. The warmed-up (TA) droop current specification is correlated to the junction temperature (TJ) value. ADI has a droop current cancellation circuit that minimizes droop current at high temperature.
Ambient (TA) temperature specifications are not subject to production testing.
REV. A |
–5– |
PKD01–Typical Performance Characteristics
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18 |
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V |
14 |
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– |
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AMPLIFIER |
10 |
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INPUT + RANGE = V+ |
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6 |
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–55 C |
TA +125 C |
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2 |
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–55 C |
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OF |
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–2 |
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+25 C |
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RANGE |
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–6 |
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+125 C |
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INPUT |
–10 |
V– SUPPLY |
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–14 |
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–18 |
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9 |
12 |
15 |
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4 |
6 |
18 |
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SUPPLY VOLTAGE +V AND –V –V |
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6 |
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4 |
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– mV |
2 |
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VOLTAGE |
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0 |
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OFFSET |
–2 |
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–4 |
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–6 |
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–75 |
–50 |
–25 0 25 50 75 |
100 |
125 |
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TEMPERATURE – C |
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TPC 1. A and B Input Range vs. |
TPC 2. A and B Amplifiers Offset |
Supply Voltage |
Voltage vs. Temperature |
1000 |
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100 |
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Hz |
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– nV/ |
100 |
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V |
10 |
NOISE VOLTAGE |
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RS = 10k |
RMS NOISE – |
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RS = 0 |
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10 |
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1 |
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INPUT |
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0 |
10 |
100 |
1k |
0 |
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1 |
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VS = |
15V |
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TA = 25 C |
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AV = +1 |
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0.1 |
1 |
10 |
100 |
1000 |
FREQUENCY – Hz |
BANDWIDTH – kHz |
TPC 4. Input Spot Noise vs. |
TPC 5. Wideband Noise vs. |
Frequency |
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Bandwidth |
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1.0 |
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CH = 1000pF |
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18 |
RL = 10k |
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POLARITY OF |
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ERROR MAY BE |
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TA = 25 C |
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14 |
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POSITIVE OR |
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V+ SUPPLY |
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NEGATIVE |
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10 |
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+125 C |
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0.5 |
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– V |
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–ERRORmV |
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6 |
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+25 C |
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SWINGOUTPUT |
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2 |
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–55 C |
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0 |
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–2 |
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–55 C |
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+125 C |
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–6 |
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+25 C |
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–0.5 |
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+25 C |
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–10 |
V– SUPPLY |
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+125 C |
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–55 C |
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–14 |
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–1.0 |
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–18 |
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9 |
12 |
15 |
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–10 |
–5 |
0 |
5 |
10 |
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4 |
6 |
18 |
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VIN – V |
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SUPPLY VOLTAGE +V AND –V – V |
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TPC 7. Amplifier A Charge Injec- |
TPC 8. Output Voltage Swing vs. |
tion Error vs. Input Voltage and |
Supply Voltage (Dual Supply |
Temperature |
Operation) |
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40 |
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35 |
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30 |
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– nA |
25 |
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OS |
20 |
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A,B I |
15 |
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10 |
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5 |
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0 |
–25 |
0 |
25 |
50 |
75 |
100 |
125 |
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–75 –50 |
150 |
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TEMPERATURE – C |
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TPC 3. A, B IOS vs. Temperature
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1.0 |
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+125 C |
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0.5 |
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+25 C |
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–55 C |
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– mV |
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ERROR |
0 |
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–0.5 |
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–1.0 |
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–10 |
–5 |
0 |
5 |
10 |
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VIN – V |
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TPC 6. Amplifier B Charge Injection Error vs. Input Voltage and Temperature
|
15 |
+25 C |
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12.5 |
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– Volts |
10.0 |
–55 C |
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7.5 |
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5.0 |
+125 C |
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SWING |
2.5 |
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0 |
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–2.5 |
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OUTPUT |
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–5.0 |
–55 C |
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–7.5 |
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+25 C |
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–10.0 |
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–12.5 |
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–15 |
+125 C |
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1.0 |
0.1 |
10.0 |
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LOAD RESISTOR TO GROUND – k |
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TPC 9. Output Voltage vs. Load Resistance
–6– |
REV. A |