Analog Devices OP97FS-REEL7, OP97FS-REEL, OP97FS, OP97EP, OP97ARC-883 Datasheet

a		Low-Power, High-Precision
		Operational Amplifier
		OP97

FEATURES

Low Supply Current: 600 A Max

OP07 Type Performance Offset Voltage: 20 V Max

Offset Voltage Drift: 0.6 V/ C Max

Very Low Bias Current

25 C: 100 pA Max

–55 C to +125 C: 250 pA Max

High Common-Mode Rejection: 114 dB Min

Extended Industrial Temperature Range: –40 C to +85 C

Available In Die Form

PIN CONNECTIONS

Epoxy Mini-DIP (P Suffix)

8-Pin Cerdip

(Z Suffix)

8-Pin SO (S Suffix)

NULL	1	OP97	8	NULL
–IN	2		7	V+
+IN	3		6	OUT
V–	4		5	OVER
				COMP

GENERAL DESCRIPTION

The OP97 is a low power alternative to the industry-standard OP07 precision amplifier. The OP97 maintains the standards of performance set by the OP07 while utilizing only 600 A supply current, less than 1/6 that of an OP07. Offset voltage is an ultralow 25 V, and drift over temperature is below 0.6 V/°C. External offset trimming is not required in the majority of circuits.

Improvements have been made over OP07 specifications in several areas. Notable is bias current, which remains below 250 pA over the full military temperature range. The OP97 is ideal for use in precision long-term integrators or sample-and- hold circuits that must operate at elevated temperatures.

Common-mode rejection and power supply rejection are also improved with the OP97, at 114 dB minimum over wider ranges of common-mode or supply voltage. Outstanding PSR, a supply range specified from ±2.25 V to ±20 V and the OP97’s minimal power requirements combine to make the OP97 a preferred device for portable and battery-powered instruments.

The OP97 conforms to the OP07 pinout, with the null potentiometer connected between Pins 1 and 8 with the wiper to V+. The OP97 will upgrade circuit designs using 725, OP05, OP07, OP12, and 1012 type amplifiers. It may replace 741-type amplifiers in circuits without nulling or where the nulling circuitry has been removed.

REV. D

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: [phone]	www.analog.com
Fax: [phone]	© Analog Devices, Inc., 2002

OP97–SPECIFICATIONS

ELECTRICAL CHARACTERISTICS (@ VS = 15 V, VCM = 0 V, TA = 25 C, unless otherwise noted.)

				OP97A/E			OP97F
Parameter	Symbol	Conditions	Min	Typ	Max	Min	Typ	Max	Unit
Input Offset Voltage	VOS			10	25		30	75	µV
Long-Term Offset	∆VOS/Time								µV/Month
Voltage Stability				0.3			0.3
Input Offset Current	IOS			30	100		30	150	pA
Input Bias Current	IB			±30	±100		±30	±150	pA
Input Noise Voltage	en p-p	0.1 Hz to 10 Hz		0.5			0.5		µV p-p
Input Noise Voltage Density	en	fO = 10 Hz2		17	30		17	30	nV/√Hz
		fO = 1000 Hz3		14	22		14	22	nV/√Hz
Input Noise Current Density	in	fO = 10 Hz		20			20		fA/√Hz
Large-Signal Voltage Gain	AVO	VO = ±10 V; RL = 2 kΩ	300	2000		200	2000		V/mV
Common-Mode Rejection	CMR	VCM = ±13.5 V	114	132		110	132		dB
Power-Supply Rejection	PSR	VS = ±2 V to ±20 V	114	132		110	132		dB
Input Voltage Range	IVR	(Note 1)	±13.5	±14.0		±13.5	±14.0		V
Output Voltage Swing	VO	RL = 10 kΩ	±13	±14		±13	±14		V
Slew Rate	SR		0.1	0.2		0.1	0.2		V/µs
Differential Input Resistance	RIN	(Note 4)	30			30			MΩ
Closed-Loop Bandwidth	BW	AVCL = 1	0.4	0.9		0.4	0.9		MHz
Supply Current	ISY			380	600		380	600	µA
Supply Voltage	VS	Operating Range	±2	±15	±20	±2	±15	±20	V

NOTES

1Guaranteed by CMR test.

210 Hz noise voltage density is sample tested. Devices 100% tested for noise are available on request. 3Sample tested.

4Guaranteed by design.

Specifications subject to change without notice.

		(@ VS = 15 V, VCM = 0 V, –40 C ≤ TA ≤ +85 C for the OP97E/F and –55 C ≤ TA ≤ +125 C
ELECTRICAL CHARACTERISTICS for the OP97A, unless otherwise noted.)
				OP97A/E			OP97F
Parameter	Symbol	Conditions	Min	Typ	Max	Min	Typ	Max	Unit
Input Offset Voltage	VOS			25	60		60	200	µV
Average Temperature	TCVOS	S-Package		0.2	0.6		0.3	2.0	µV/°C
Coefficient of VOS							0.3
Input Offset Current	IOS			60	250		80	750	pA
Average Temperature	TCIOS			0.4	2.5		0.6	7.5	pA/°C
Coefficient of IOS				±60	±250		±80	±750
Input Bias Current	IB								pA
Average Temperature									pA/°C
Coefficient of IB	TCIB	VO = 10 V; RL = 2 kΩ		0.4	2.5		0.6	7.5
Large Signal Voltage Gain	AVO		200	1000		150	1000		V/mV
Common-Mode Rejection	CMR	VCM = ±13.5 V	108	128		108	128		dB
Power Supply Rejection	PSR	VS = ±2.5 V to ±20 V	108	126		108	128		dB
Input Voltage Range	IVR	(Note 1)	±13.5	±14.0		±13.5	±14.0		V
Output Voltage Swing	VO	RL = 10 kΩ	±13	±14		±13	±14		V
Slew Rate	SR		0.05	0.15		0.05	0.15		V/µs
Supply Current	ISY			400	800		400	800	µA
Supply Voltage	VS	Operating Range	±2.5	±15	±20	±2.5	±15	±20	V

NOTES

1Guaranteed by CMR test.

Specifications subject to change without notice.

–2–

REV. D

OP97

ABSOLUTE MAXIMUM RATINGS1					± 20 V
Supply Voltage . . . . . . . . . . . .		. . . . . . . .	. . . . . . . . .	.
Input Voltage2 . . . . . . . . . . . . .		. . . . . . .	. . . . . . . . . .		. ± 20 V
Differential Input Voltage3 . . .		. . . . . . .	. . . . . . . . . .		. . ± 1 V
Differential Input Current3 . . .		. . . . . . .	. . . . . . . . . .		± 10 mA
Output Short-Circuit Duration		. . . . . . .	. . . . . . . . .	Indefinite
Operating Temperature Range			–55°C to +125°C
OP97A (Z) . . . . . . . . . . . . . .		. . . . . . .
OP97E, F (P, Z, S) . . . . . . . .		. . . . . . .	. . . –40°C to +85°C
Storage Temperature Range . .		. . . . . . .	. . . –65°C to +150°C
Junction Temperature Range . .		. . . . . . .	. . . –65°C to +150°C
Lead Temperature (Soldering, 60 sec) .			. . . . . . . . . .		. 300°C
Package Type		JA4	JC		Unit
8-Lead Hermetic DIP (Z)		148	16		°C/W
8-Lead Plastic DIP (P)		103	43		°C/W
8-Lead SO (S)		158	43		°C/W

NOTES

1Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted.

2For supply voltages less than ±20 V, the absolute maximum input voltage is equal to the supply voltage.

3The OP97’s inputs are protected by back-to-back diodes. Current-limiting resistors are not used in order to achieve low noise. Differential input voltages greater than 1 V will cause excessive current to flow through the input protection diodes unless limiting resistance is used.

4θJA is specified for worst case mounting conditions, i.e., θJA is specified for device in socket for TO, cerdip, and P-DIP packages; θJA is specified for device soldered to printed circuit board for SO package.

ORDERING GUIDE

	Temperature	Package
Model	Range	Option1
OP97AZ3	–55°C to +125°C	8-Lead Cerdip
OP97ARC/8832, 3	–55°C to +125°C	20-Contact LCC
OP97EJ3	–40°C to +85°C	TO-99
OP97EZ3	–40°C to +85°C	8-Lead Cerdip
OP97EP	–40°C to +85°C	8-Lead Plastic DIP
OP97FZ3	–40°C to +85°C	8-Lead Cerdip
OP97FP	–40°C to +85°C	8-Lead Plastic DIP
OP97FS	–40°C to +85°C	8-Lead SOIC
OP97FS-REEL	–40°C to +85°C	8-Lead SOIC
OP97FS-REEL7	–40°C to +85°C	8-Lead SOIC

NOTES

1For outline information see Package Information section.

2For devices processed in total compliance to MIL-STD-883, add /883 after part number. Consult factory for /883 data sheet.

3Not for new designs; obsolete April 2002.

For Military processed devices, please refer to the Standard Microcircuit Drawing (SMD) available at www.dscc.dla.mil/programs/milspec/default.asp

SMD Part Number	ADI Equivalent
59628954401PA	OP97AZMDA
59628954401GA*	OP97AJMDA

*Not for new designs; obsolete April 2002.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the OP97 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

WARNING!

ESD SENSITIVE DEVICE

REV. D

–3–

OP97–Typical Performance Characteristics

400
		1894	UNITS						VS =			15V
									TA = 25 C
									VCM = 0V
300
OFUNITS
200
NUMBER
100
0
			–20			0		20				40
–40

INPUT OFFSET VOLTAGE – V

TPC 1. Typical Distribution of Input

Offset Voltage

400
		1920 UNITS																		VS =						15V
																				TA = 25 C
300																				VCM = 0V
OFUNITS
200
NUMBER
100
0
				–50						0									50						100
–100

INPUT BIAS CURRENT – pA

TPC 2. Typical Distribution of Input

Bias Current

	500
			1894		UNITS		VS =			15V
							TA = 25 C
	400						VCM = 0V
UNITS	300
OF
NUMBER	200
	100

0

–60 –40 –20 0 20 40 60 INPUT OFFSET CURRENT – pA

TPC 3. Typical Distribution of Input

Offset Current

60

TA = 25 C

40

VCM = 0V

IB–

- pA

20

CURRENT

IB+

INPUT

0

–20

I

OS

–40

–60

–75 –50 –25 0 25 50 75 100 125 TEMPERATURE – C

TPC 4. Input Bias, Offset Current vs. Temperature

	1000
V		BALANCED OR UNBALANCED
		VS =	15V
–
		VCM = 0V
VOLTAGE	100
OFFSET		–55 C	TA	+125 C
	10	TA = 25 C
EFFECTIVE
	1
	1k	3k	10k	30k	100k 300k	1M	3M	10M
			SOURCE RESISTANCE –

TPC 7. Effective Offset Voltage vs. Source Resistance

60

TA = 25 C

40

VS =

15V

IB–

- pA

20

IB+

CURRENT

0

INPUT

–20

IOS

–40

–60

–15 –10 –5

0

5

10

15

COMMON-MODE VOLTAGE – Volts

TPC 5. Input Bias, Offset Current vs. Common-Mode Voltage

C

100

V/

BALANCED OR

UNBALANCED

–

VS =

15V

DRIFT

VCM = 0V

10

VOLTAGE

OFFSET

1

EFFECTIVE

0.1

10k

100k

1M

10M

100M

1k

SOURCE RESISTANCE –

TPC 8. Effective TCVOS vs. Source Resistance

	5
V		TA = 25 C
		VS =	15V
–
	4	VCM = 0V
VALUE
FINAL	3
FROM	2
DEVIATION		J PACKAGES
	1
			Z, P PACKAGES
	0			2	3	4	5
	0		1

TIME AFTER POWER APPLIED – Minutes

TPC 6. Input Offset Voltage

Warm-Up Drift

	20
	15		TA = –55 C
- mA
	10		TA = +25 C
CURRENT
	5	VS = 15V	TA = +125 C
CIRCUIT	0		TA = +125 C
		OUTPUT SHORTED TO GROUND
SHORT	–5
	–10		TA = +25 C
	–15
	–20		TA = –55 C
	0	1	2	3

TIME FROM OUTPUT SHORT – Minutes

TPC 9. Short Circuit Current vs. Time, Temperature

–4–

REV. D