DM74LS390M
© 2000 Fairchild Semiconductor Corporation DS006433 www.fairchildsemi.com
August 1986
Revised March 2000
DM74LS390 Dual 4-Bit Decade Counter
DM74LS390
Dual 4-Bit Decade Counter
General Description
Each of these monolithic circuits contains eight master-
slave flip-flops and additional gating to implement two indi-
vidual four-bit counters in a single package. The
DM74LS390 incorporates dual divide-by-two and divide-
by-five counters, which can be used to implement cycle
lengths equal to any whole and/or cumulative multiples of 2
and/or 5 up to divi de-by- 100. Whe n c onnecte d as a bi-q ui-
nary counter, the separate divide-by-two circuit can be
used to provide symmetry (a squ are wave ) at the final out-
put stage. The DM74 LS39 0 ha s parallel outputs from ea ch
counter stage so that any submultiple of the input count fre-
quency is available for system-timing signals.
Features
■ Dual version of the popular DM74LS90
■ DM74LS390...individual clocks for A and B flip-flops
provide dual ÷ 2 and ÷ 5 counters
■ Direct clear for each 4-bit counter
■ Dual 4-bit version can significa ntly impr ove syste m den-
sities by reducing counter package count by 50%
■ Typical maximum count frequency...35 MHz
■ Buffered outputs reduce possibility of collector commu-
tation
Ordering Code:
Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering code.
Connection Diagram
Order Number Package Number Package Description
DM74LS390M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM74LS390N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
www.fairchildsemi.com 2
DM74LS390
Function Tables
BCD Count Sequence
(Each Counter) (Note 1)
Bi-Quinary (5-2)
(Each Counter) (Note 2)
H = HIGH Level
L = LOW Level
Note 1: Output Q
A
is connected to input B for BCD count.
Note 2: Output Q
D
is connected to input A for Bi-quinary count.
Logic Diagram
Count
Outputs
Q
D
Q
C
Q
B
Q
A
0LLLL
1LLLH
2LLHL
3LLHH
4LHLL
5LHLH
6LHHL
7LHHH
8HLLL
9HLLH
Count
Outputs
Q
A
Q
D
Q
C
Q
B
0LLLL
1LLLH
2LLHL
3LLHH
4LHLL
5HLLL
6HLLH
7HLHL
8HLHH
9HHLL
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