Semiconductor
This version:Oct.1999
MSM51V18165F
1,048,576-Word x 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO
DESCRIPTION
The MSM51V18165F is a 1,048,576-word ´ 16-bit dynamic RAM fabricated in Oki’s silicon-gate CMOS technology. The MSM51V18165F achieves high integration, high-speed operation, and low-power consumption because Oki manufactures the device in a quadruple-layer polysilicon/double-layer metal CMOS process. The MSM51V18165F is available in a 42-pin plastic SOJ or 50/44-pin plastic TSOP.
FEATURES
·1,048,576-word ´ 16-bit configuration
·Single 3.3V power supply, ±0.3V tolerance
· |
Input |
: LVTTL compatible, low input capacitance |
· |
Output |
: LVTTL compatible, 3-state |
· |
Refresh |
: 1024 cycles/16ms |
·Fast page mode with EDO, read modify write capability
·CAS before RAS refresh, hidden refresh, RAS-only refresh capability
·CAS before RAS self-refresh capability
·Package options:
42-pin 400mil plastic SOJ |
(SOJ42-P-400-1.27) |
(Product : MSM51V18165F-xxJS) |
50/44-pin 400mil plastic TSOP |
(TSOPII50/44-P-400-0.80-K) |
(Product : MSM51V18165F-xxTS-K) |
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(TSOPII50/44-P-400-0.80-L) |
(Product : MSM51V18165F-xxTS-L) |
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xx indicates speed rank. |
PRODUCT FAMILY
Family |
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Access Time (Max.) |
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Cycle Time |
Power Dissipation |
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tRAC |
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tAA |
tCAC |
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tOEA |
(Min.) |
Operating (Max.) |
Standby (Max.) |
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50ns |
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25ns |
13ns |
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13ns |
84ns |
324mW |
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MSM51V18165F |
60ns |
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30ns |
15ns |
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15ns |
104ns |
288mW |
1.8mW |
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70ns |
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35ns |
20ns |
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20ns |
124ns |
252mW |
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No.
1/14
PIN CONFIGRATION (TOP VIEW)
VCC 1 |
42 |
VSS |
DQ1 2 |
41 |
DQ16 |
DQ2 3 |
40 |
DQ15 |
DQ3 4 |
39 |
DQ14 |
DQ4 5 |
38 |
DQ13 |
VCC 6 |
37 |
VSS |
DQ5 7 |
36 |
DQ12 |
DQ6 8 |
35 |
DQ11 |
DQ7 9 |
34 |
DQ10 |
DQ8 10 |
33 |
DQ9 |
NC 11 |
32 |
NC |
NC 12 |
31 |
LCAS |
WE 13 |
30 UCAS |
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RAS 14 |
29 |
OE |
NC 15 |
28 |
A9 |
NC 16 |
27 |
A8 |
A0 17 |
26 |
A7 |
A1 18 |
25 |
A6 |
A2 19 |
24 |
A5 |
A3 20 |
23 |
A4 |
VCC 21 |
22 |
VSS |
42-Pin Plastic SOJ
VCC |
1 |
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50 |
VSS |
VSS |
50 |
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1 |
VCC |
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DQ1 |
2 |
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49 |
DQ16 DQ16 |
49 |
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2 |
DQ1 |
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DQ2 |
3 |
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48 |
DQ15 DQ15 |
48 |
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3 |
DQ2 |
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DQ3 |
4 |
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47 |
DQ14 DQ14 |
47 |
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4 |
DQ3 |
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DQ4 |
5 |
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46 |
DQ13 DQ13 |
46 |
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5 |
DQ4 |
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VCC |
6 |
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45 |
VSS |
VSS |
45 |
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6 |
VCC |
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DQ5 |
7 |
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44 |
DQ12 DQ12 |
44 |
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7 |
DQ5 |
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DQ6 |
8 |
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43 |
DQ11 DQ11 |
43 |
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8 |
DQ6 |
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DQ7 |
9 |
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42 |
DQ10 DQ10 |
42 |
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9 |
DQ7 |
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DQ8 |
10 |
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41 |
DQ9 |
DQ9 |
41 |
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10 |
DQ8 |
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NC |
NC |
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NC |
11 |
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40 |
40 |
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11 |
NC |
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NC |
15 |
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36 |
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NC |
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NC |
36 |
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15 |
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NC |
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NC |
16 |
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35 |
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LCAS |
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LCAS |
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35 |
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16 |
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NC |
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WE |
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17 |
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34 |
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UCAS |
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UCAS |
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34 |
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17 |
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WE |
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RAS |
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18 |
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33 |
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OE |
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OE |
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33 |
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18 |
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RAS |
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NC |
19 |
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32 |
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A9 |
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A9 |
32 |
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19 |
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NC |
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NC |
20 |
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31 |
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A8 |
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A8 |
31 |
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20 |
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NC |
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A0 |
21 |
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30 |
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A7 |
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A7 |
30 |
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21 |
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A0 |
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A1 22 |
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29 |
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A6 |
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A6 29 |
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22 |
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A1 |
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A5 |
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A2 |
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A2 23 |
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28 |
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A5 28 |
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23 |
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A4 |
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A3 |
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A3 24 |
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27 |
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A4 27 |
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24 |
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VCC 25 |
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26 |
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VSS |
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VSS 26 |
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25 |
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VCC |
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55/44-Pin Plastic TSOP |
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55/44-Pin Plastic TSOP |
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(K Type) |
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(L Type) |
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Pin Name |
Function |
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A0–A9 |
Address Input |
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RAS |
Row Address Strobe |
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LCAS |
Lower Byte Column Address Strobe |
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UCAS |
Upper Byte Column Address Strobe |
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DQ1–DQ16 |
Data Input/Data Output |
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OE |
Output Enable |
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WE |
Write Enable |
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VCC |
Power Supply (3.3V) |
VSS |
Ground (0V) |
NC |
No Connection |
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Note : The same power supply voltage must be provided to every VCC pin, and the same
GND voltage level must be provided to every VSS pin.
No.
2/14
BLOCK DIAGRAM
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WE |
OE |
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Timing |
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RAS |
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Generator |
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I/O |
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Controller |
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LCAS |
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Output |
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UCAS |
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I/O |
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8 |
Buffers |
8 |
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Controller |
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DQ1-DQ8 |
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10 |
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Address |
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10 |
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Column Decoders |
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8 |
Input |
8 |
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Buffers |
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Buffers |
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I/O |
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A0-A9 |
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Internal |
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Refresh |
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Sense Amplifiers |
16 |
Selector |
16 |
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Address |
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Control Clock |
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Counter |
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8 |
Input |
8 |
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Buffers |
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10 |
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Row |
10 |
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Row |
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Address |
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DQ9-DQ16 |
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Buffers |
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Deco- |
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Word |
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Memory |
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Drivers |
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Cells |
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8 |
Output |
8 |
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Buffers |
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VCC
VSS
On Chip
VBB Generator
On Chip
IVCC Generator
FUNCTION TABLE
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Input Pin |
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DQ Pin |
Function Mode |
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RAS |
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LCAS |
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UCAS |
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WE |
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OE |
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DQ1-DQ8 |
DQ9-DQ16 |
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H |
* |
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* |
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* |
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* |
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High-Z |
High-Z |
Standby |
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L |
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H |
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H |
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* |
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* |
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High-Z |
High-Z |
Refresh |
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L |
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L |
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H |
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H |
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L |
DOUT |
High-Z |
Lower Byte Read |
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L |
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H |
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L |
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H |
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L |
High-Z |
DOUT |
Upper Byte Read |
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L |
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L |
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L |
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H |
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L |
DOUT |
DOUT |
Word Read |
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L |
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L |
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H |
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L |
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H |
DIN |
Don’t Care |
Lower Byte Write |
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L |
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H |
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L |
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L |
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H |
Don’t Care |
DIN |
Upper Byte Write |
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L |
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L |
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L |
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L |
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H |
DIN |
DIN |
Word Write |
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L |
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L |
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L |
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H |
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H |
High-Z |
High-Z |
¾ |
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* : “H” or “L”
No.
3/14
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Parameter |
Symbol |
Rating |
Unit |
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Voltage on Any Pin Relative to VSS |
VIN, VOUT |
- 0.5 to VCC + 0.3 |
V |
Voltage VCC Supply relative to VSS |
VCC |
- 0.5 to 4.6 |
V |
Short Circuit Output Current |
IOS |
50 |
mA |
Power Dissipation |
PD* |
1 |
W |
Operating Temperature |
Topr |
0 to 70 |
°C |
Storage Temperature |
Tstg |
- 55 to 150 |
°C |
*: Ta = 25°C
Recommended Operating Conditions
(Ta = 0 °C to 70 °C)
Parameter |
Symbol |
Min. |
Typ. |
Max. |
Unit |
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Power Supply Voltage |
VCC |
3.0 |
3.3 |
3.6 |
V |
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VSS |
0 |
0 |
0 |
V |
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Input High Voltage |
VIH |
2.0 |
¾ |
VCC + 0.3*1 |
V |
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Input Low Voltage |
VIL |
- 0.3*2 |
¾ |
0.8 |
V |
Notes: *1. The input voltage is VCC + 1.0V when the pulse width is less than 20ns (the pulse width is with respect to the point at which VCC is applied).
*2. The input voltage is VSS - 1.0V when the pulse width is less than 20ns (the pulse width respect to the point at which VSS is applied).
Capacitance
(VCC = 3.3V ± 0.3V, Ta = 25°C, f=1MHz)
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Parameter |
Symbol |
Typ. |
Max. |
Unit |
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Input Capacitance (A0 - A9) |
CIN1 |
¾ |
5 |
pF |
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Input Capacitance |
CIN2 |
¾ |
7 |
pF |
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(RAS, LCAS, UCAS, WE, OE) |
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Output Capacitance (DQ1 - DQ16) |
CI/O |
¾ |
7 |
pF |
No.
4/14
DC Characteristics
(VCC = 3.3V ± 0.3V, Ta = 0°C to 70°C)
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MSM51V18165 |
MSM51V18165 |
MSM51V18165 |
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Parameter |
Symbol |
Condition |
F-50 |
F-60 |
F-70 |
Unit |
Note |
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Min. |
Max. |
Min. |
Max. |
Min. |
Max. |
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Output High Voltage |
VOH |
IOH = -2.0mA |
2.4 |
VCC |
2.4 |
VCC |
2.4 |
VCC |
V |
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Output Low Voltage |
VOL |
IOL = 2mA |
0 |
0.4 |
0 |
0.4 |
0 |
0.4 |
V |
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Input Leakage |
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0V £ VI £ VCC+0.3V; |
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ILI |
All other pins not |
- 10 |
10 |
- 10 |
10 |
- 10 |
10 |
mA |
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Current |
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under test = 0V |
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Output Leakage |
ILO |
DQ disable |
- 10 |
10 |
- 10 |
10 |
- 10 |
10 |
mA |
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Current |
0V £ VO £ VCC |
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Average Power |
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RAS, CAS cycling, |
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Supply Current |
ICC1 |
¾ |
90 |
¾ |
80 |
¾ |
70 |
mA |
1,2 |
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tRC = Min. |
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(Operating) |
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Power Supply |
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RAS, CAS = VIH |
¾ |
2 |
¾ |
2 |
¾ |
2 |
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Current |
ICC2 |
RAS, CAS |
¾ |
0.5 |
¾ |
0.5 |
¾ |
0.5 |
mA |
1 |
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(Standby) |
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³ VCC - 0.2V |
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Average Power |
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RAS cycling, |
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Supply Current |
ICC3 |
CAS = VIH, |
¾ |
90 |
¾ |
80 |
¾ |
70 |
mA |
1,2 |
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(RAS-only Refresh) |
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tRC = Min. |
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Power Supply |
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RAS = VIH, |
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Current |
ICC5 |
CAS = VIL, |
¾ |
5 |
¾ |
5 |
¾ |
5 |
mA |
1 |
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(Standby) |
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DQ = enable |
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Average Power |
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RAS = cycling, |
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Supply Current |
ICC6 |
¾ |
90 |
¾ |
80 |
¾ |
70 |
mA |
1,2 |
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(CAS before RAS |
CAS before RAS |
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Refresh) |
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Average Power |
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RAS = VIL, |
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Supply Current |
ICC7 |
CAS cycling, |
¾ |
90 |
¾ |
80 |
¾ |
70 |
mA |
1,3 |
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(Fast Page Mode) |
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tHPC = Min. |
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Notes: 1. ICC Max. is specified as ICC for output open condition.
2.The address can be changed once or less while RAS = VIL.
3.The address can be changed once or less while CAS = VIH.
No.
5/14