October 1995
DP8392C/DP8392C-1 CTI
Coaxial Transceiver Interface
General Description
The DP8392C Coaxial Transceiver Interface (CTI) is a coaxial cable line driver/receiver for Ethernet/Thin Ethernet (Cheapernet) type local area networks. The CTI is connected between the coaxial cable and the Data Terminal Equipment (DTE). In Ethernet applications the transceiver is usually mounted within a dedicated enclosure and is connected to the DTE via a transceiver cable. In Cheapernet applications, the CTI is typically located within the DTE and connects to the DTE through isolation transformers only. The CTI consists of a Receiver, Transmitter, Collision Detector, and a Jabber Timer. The Transmitter connects directly to a 50 ohm coaxial cable where it is used to drive the coax when transmitting. During transmission, a jabber timer is initiated to disable the CTI transmitter in the event of a longer than legal length data packet. Collision Detection circuitry monitors the signals on the coax to determine the presence of colliding packets and signals the DTE in the event of a collision.
The CTI is part of a three chip set that implements the complete IEEE 802.3 compatible network node electronics as shown below. The other two chips are the DP8391 Serial Network Interface (SNI) and the DP8390 Network Interface Controller (NIC).
The SNI provides the Manchester encoding and decoding functions; whereas the NIC handles the Media Access Protocol and the buffer management tasks. Isolation between the CTI and the SNI is an IEEE 802.3 requirement that can be easily satisfied on signal lines using a set of pulse transformers that come in a standard DIP. However, the power isolation for the CTI is done by DC-to-DC conversion through a power transformer.
Features
Y Compatible with Ethernet II, IEEE 802.3 10Base5 and 10Base2 (Cheapernet)
Y Integrates all transceiver electronics except signal & power isolation
YInnovative design minimizes external component count
YJabber timer function integrated on chip
YExternally selectable CD Heartbeat allows operation with IEEE 802.3 compatible repeaters
YPrecision circuitry implements receive mode collision detection
YSquelch circuitry at all inputs rejects noise
Y Designed for rigorous reliability requirements of IEEE 802.3
Y Standard Outline 16-pin DIP uses a special leadframe that significantly reduces the operating die temperature
Table of Contents
1.0 System Diagram
2.0 Block Diagram
3.0Functional Description
3.1Receiver Functions
3.2Transmitter Functions
3.3Collision Functions
3.4Jabber Functions
4.0 Typical Applications
5.0 Connection Diagrams
6.0 Pin Descriptions
7.0 Absolute Maximum Ratings
8.0 DP8392C Electrical Characteristics
9.0 DP8392C-1 Electrical Characteristics
10.0 Switching Characteristics
11.0 Timing and Load Diagram
1.0 System Diagram
TL/F/11085 ± 1
IEEE 802.3 Compatible Ethernet/Cheapernet Local Area Network Chip Set
Interface Transceiver Coaxial CTI 1-DP8392C/DP8392C
C1995 National Semiconductor Corporation |
TL/F/11085 |
RRD-B30M115/Printed in U. S. A. |
2.0 Block Diagram
TL/F/11085 ± 2
FIGURE 1. DP8392C Block Diagram
3.0 Functional Description
The CTI consists of four main logical blocks:
a)the Receiver - receives data from the coax and sends it to the DTE
b)the Transmitter - accepts data from the DTE and transmits it onto the coax
c)the Collision Detect circuitry - indicates to the DTE any collision on the coax
d)the Jabber Timer - disables the Transmitter in case of longer than legal length packets
3.1 RECEIVER FUNCTIONS
The Receiver includes an input buffer, a cable equalizer, a 4-pole Bessel low pass filter, a squelch circuit, and a differential line driver.
The buffer provides high input impedance and low input capacitance to minimize loading and reflections on the coax.
The equalizer is a high pass filter which compensates for the low pass effect of the cable. The composite result of the maximum length cable and the equalizer is a flatband response at the signal frequencies to minimize jitter.
The 4-pole Bessel low pass filter extracts the average DC level on the coax, which is used by both the Receiver squelch and the collision detection circuits.
The Receiver squelch circuit prevents noise on the coax from falsely triggering the Receiver in the absence of the signal. At the beginning of the packet, the Receiver turns on when the DC level from the low pass filter is lower than the DC squelch threshold. However, at the end of the packet, a quick Receiver turn off is needed to reject dribble bits. This is accomplished by an AC timing circuit that reacts to high level signals of greater than typically 200 ns in duration. The
Receiver then stays off only if within about 1 ms, the DC level from the low pass filter rises above the DC squelch threshold. Figure 2 illustrates the Receiver timing.
The differential line driver provides ECL compatible signals to the DTE with typically 3 ns rise and fall times. In its idle state, its outputs go to differential zero to prevent DC standing current in the isolation transformer.
3.2 TRANSMITTER FUNCTIONS
The Transmitter has a differential input and an open collector output current driver. The differential input common mode voltage is established by the CTI and should not be altered by external circuitry. The transformer coupling of TXg will satisfy this condition. The driver meets all IEEE 802.3/Ethernet Specifications for signal levels. Controlled rise and fall times (25 ns V g5 ns) minimize the higher harmonic components. The rise and fall times are matched to minimize jitter. The drive current levels of the DP8392C meet the tighter recommended limits of IEEE 802.3 and are set by a built-in bandgap reference and an external 1% resistor. An on chip isolation diode is provided to reduce the Transmitter's coax load capacitance. For Ethernet compatible applications, an external isolation diode (see Figure 4 ) may be added to further reduce coax load capacitance. In Cheapernet compatible applications the external diode is not required as the coax capacitive loading specifications are relaxed.
The Transmitter squelch circuit rejects signals with pulse widths less than typically 20 ns (negative going), or with levels less than b175 mV. The Transmitter turns off at the end of the packet if the signal stays higher than b175 mV for more than approximately 300 ns. Figure 3 illustrates the Transmitter timing.
2
3.0 Functional Description (Continued)
3.3 COLLISION FUNCTIONS
The collision circuitry consists of two buffers, two 4-pole Bessel low pass filters (section 3.1), a comparator, a heartbeat generator, a 10 MHz oscillator, and a differential line driver.
Two identical buffers and 4-pole Bessel low pass filters extract the DC level on the center conductor (data) and the shield (sense) of the coax. These levels are monitored by the comparator. If the data level is more negative than the sense level by at least the collision threshold (Vth), the collision output is enabled.
At the end of every transmission, the heartbeat generator creates a pseudo collision for a short time to ensure that the collision circuitry is properly functioning. This burst on collision output occurs typically 1.1 ms after the transmission, and has a duration of about 1 ms. This function can be disabled externally with the HBE (Heartbeat Enable) pin to allow operation with repeaters.
The 10 MHz oscillator generates the signal for the collision and heartbeat functions. It is also used as the timebase for all the jabber functions. It does not require any external components.
The collision differential line driver transfers the 10 MHz signal to the CDg pair in the event of collision, jabber, or heartbeat conditions. This line driver also features zero differential idle state.
3.4 JABBER FUNCTIONS
The Jabber Timer monitors the Transmitter and inhibits transmission if the Transmitter is active for longer than 20 ms (fault). It also enables the collision output for the fault duration. After the fault is removed, The Jabber Timer waits for about 500 ms (unjab time) before re-enabling the Transmitter. The transmit input must stay inactive during the unjab time.
TL/F/11085 ± 3
FIGURE 2. Receiver Timing
TL/F/11085 ± 4
FIGURE 3. Transmitter Timing
3
4.0 Typical Application
Note 1: T1 is a 1:1 pulse transformer, L e 100 mH Pulse Engineering (San Diego) Part No. 64103 Valor Electronics (San Diego) Part No. LT6003 or equivalent
TL/F/11085 ± 5
FIGURE 4
5.0 Connection Diagrams
TL/F/11085 ± 16
Top View
Order Number DP8392CN
See NS Package Number N16E
TL/F/11085 ± 6
Order Number DP8392CV
See NS Package Number V28A
FIGURE 5
4
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