June 1989
54LS164/DM54LS164/DM74LS164
8-Bit Serial In/Parallel Out Shift Registers
General Description
These 8-bit shift registers feature gated serial inputs and an asynchronous clear. A low logic level at either input inhibits entry of the new data, and resets the first flip-flop to the low level at the next clock pulse, thus providing complete control over incoming data. A high logic level on either input enables the other input, which will then determine the state of the first flip-flop. Data at the serial inputs may be changed while the clock is high or low, but only information meeting the setup and hold time requirements will be entered. Clocking occurs on the low-to-high level transition of the clock input. All inputs are diode-clamped to minimize transmis- sion-line effects.
Features
YGated (enable/disable) serial inputs
YFully buffered clock and serial inputs
YAsynchronous clear
YTypical clock frequency 36 MHz
YTypical power dissipation 80 mW
YAlternate Military/Aerospace device (54LS164) is available. Contact a National Semiconductor Sales Office/ Distributor for specifications.
Connection Diagram |
Function Table |
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Dual-In-Line Package |
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Inputs |
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Outputs |
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Clear |
Clock |
A |
B |
QA |
QB ... |
QH |
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L |
X |
X |
X |
L |
L ... |
L |
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H |
L |
X |
X |
QA0 |
QB0 ... |
QH0 |
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H |
u |
H |
H |
H |
QAn ... |
QGn |
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H |
u |
L |
X |
L |
QAn ... |
QGn |
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H |
u |
X |
L |
L |
QAn ... |
QGn |
H e High Level (steady state), L e Low Level (steady state) X e Don't Care (any input, including transitions)
u e Transition from low to high level
QA0, QB0, QH0 e The level of QA, QB, or QH, respectively, before the indicated steady-state input conditions were established.
QAn, QGn e The level of QA or QG before the most recent u transition of the clock; indicates a one-bit shift.
TL/F/6398 ± 1
Order Number 54LS164DMQB, 54LS164FMQB, 54LS164LMQB, DM54LS164J, DM54LS164W, DM74LS164M or DM74LS164N
See NS Package Number E20A, J14A, M14A, N14A or W14B
Logic Diagram
TL/F/6398 ± 2
Registers Shift Out In/Parallel Serial Bit-8 54LS164/DM54LS164/DM74LS164
C1995 National Semiconductor Corporation |
TL/F/6398 |
RRD-B30M105/Printed in U. S. A. |
Absolute Maximum Ratings (Note)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
Supply Voltage |
7V |
Input Voltage |
7V |
Operating Free Air Temperature Range |
b55§C to a125§C |
DM54LS and 54LS |
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DM74LS |
0§C to a70§C |
Storage Temperature Range |
b65§C to a150§C |
Note: The ``Absolute Maximum Ratings'' are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the ``Electrical Characteristics'' table are not guaranteed at the absolute maximum ratings. The ``Recommended Operating Conditions'' tables will define the conditions for actual device operation.
Recommended Operating Conditions
Symbol |
Parameter |
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DM54LS164 |
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DM74LS164 |
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Units |
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Min |
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Nom |
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Max |
Min |
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Nom |
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Max |
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VCC |
Supply Voltage |
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4.5 |
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5 |
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5.5 |
4.75 |
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5 |
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5.25 |
V |
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VIH |
High Level Input Voltage |
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2 |
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2 |
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V |
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VIL |
Low Level Input Voltage |
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0.7 |
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0.8 |
V |
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IOH |
High Level Output Current |
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b0.4 |
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b0.4 |
mA |
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IOL |
Low Level Output Current |
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4 |
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8 |
mA |
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fCLK |
Clock Frequency (Note 4) |
0 |
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25 |
0 |
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25 |
MHz |
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tW |
Pulse Width |
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Clock |
20 |
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20 |
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ns |
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(Note 4) |
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Clear |
20 |
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20 |
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tSU |
Data Setup Time (Note 4) |
17 |
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17 |
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tH |
Data Hold Time (Note 4) |
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5 |
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5 |
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ns |
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tREL |
Clear Release Time (Note 4) |
30 |
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30 |
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ns |
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TA |
Free Air Operating Temperature |
b55 |
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125 |
0 |
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70 |
§C |
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Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Symbol |
Parameter |
Conditions |
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Min |
Typ |
Max |
Units |
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(Note 1) |
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VI |
Input Clamp Voltage |
VCC e Min, II e b18 mA |
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b1.5 |
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VOH |
High Level Output |
VCC e Min, IOH e Max |
DM54 |
2.5 |
3.4 |
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V |
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Voltage |
VIL e Max, VIH e Min |
DM74 |
2.7 |
3.4 |
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VOL |
Low Level Output |
VCC e Min, IOL e Max |
DM54 |
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0.25 |
0.4 |
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Voltage |
VIL e Max, VIH e Min |
DM74 |
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0.35 |
0.5 |
V |
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IOL e 4 mA, VCC e Min |
DM74 |
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0.25 |
0.4 |
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II |
Input Current @ Max |
VCC e Max, VI e 7V |
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0.1 |
mA |
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Input Voltage |
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IIH |
High Level Input Current |
VCC e Max, VI e 2.7V |
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20 |
mA |
IIL |
Low Level Input Current |
VCC e Max, VI e 0.4V |
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b0.4 |
mA |
IOS |
Short Circuit |
VCC e Max |
DM54 |
b20 |
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b100 |
mA |
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Output Current |
(Note 2) |
DM74 |
b20 |
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b100 |
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ICC |
Supply Current |
VCC e Max (Note 3) |
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16 |
27 |
mA |
Note 1: All typicals are at VCC e 5V, TA e 25§C. |
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Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second. |
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Note 3: ICC is measured with all outputs open, the SERIAL input grounded, the CLOCK input at 2.4V, and a momentary ground, then 4.5V, applied to the CLEAR input.
Note 4: TA e 25§C and VCC e 5V.
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