NSC DM54LS240W-883, DM54LS240W-MLS, DM54LS240J-883, DM54LS240J-MLS, DM54LS240E-883 Datasheet

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NSC DM54LS240W-883, DM54LS240W-MLS, DM54LS240J-883, DM54LS240J-MLS, DM54LS240E-883 Datasheet

April 1992

DM54LS240/DM74LS240,

DM54LS241/DM74LS241

Octal TRI-STATEÉ Buffers/Line Drivers/Line Receivers

General Description

These buffers/line drivers are designed to improve both the performance and PC board density of TRI-STATE buffers/ drivers employed as memory-address drivers, clock drivers, and bus-oriented transmitters/receivers. Featuring 400 mV of hysteresis at each low current PNP data line input, they provide improved noise rejection and high fanout outputs and can be used to drive terminated lines down to 133X.

Features

YTRI-STATE outputs drive bus lines directly

YPNP inputs reduce DC loading on bus lines

YHysteresis at data inputs improves noise margins

Y Typical IOL (sink current)

54LS

12 mA

74LS

24 mA

Y Typical IOH (source current)

54LS

b12 mA

74LS

b15 mA

Y Typical propagation delay times

Inverting

10.5 ns

Noninverting

12 ns

YTypical enable/disable time 18 ns

YTypical power dissipation (enabled)

Inverting

130 mW

Noninverting

135 mW

Connection Diagrams

Dual-In-Line Package

Dual-In-Line Package

TL/F/6411 ± 1

TL/F/6411 ± 2

 

Order Number DM54LS240J,

Order Number DM54LS241J,

DM54LS240W, DM54LS240E,

DM54LS241W, DM54LS241E,

DM74LS240WM or DM74LS240N

DM74LS241WM or DM74LS241N

See NS Package Number E20A, J20A,

See NS Package Number E20A, J20A,

M20B, N20A or W20A

M20B, N20A or W20A

Function Tables

LS240

 

Inputs

Output

 

 

 

 

 

G

A

Y

 

L

L

H

 

L

H

L

 

H

X

Z

LS241

 

 

 

 

Inputs

 

Outputs

 

 

 

 

 

 

 

 

 

G

 

G

 

1A

2A

1Y

2Y

X

 

L

 

L

X

L

 

X

 

L

 

H

X

H

 

X

 

H

 

X

X

Z

 

H

 

X

 

X

L

 

L

H

 

X

 

X

H

 

H

L

 

X

 

X

X

 

Z

L e Low Logic Level

H e High Logic Level

X e Either Low or High Logic Level

Z e High Impedance

TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.

C1995 National Semiconductor Corporation

TL/F/6411

RRD-B30M105/Printed in U. S. A.

DM54LS241/DM74LS241 DM54LS240/DM74LS240,

Receivers Drivers/Line Buffers/Line STATE-TRI Octal

Absolute Maximum Ratings (Note)

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.

Supply Voltage

7V

Input Voltage

7V

Operating Free Air Temperature Range

 

DM54LS, 54LS

b55§C to a125§C

DM74LS

0§C to a70§C

Storage Temperature Range

b65§C to a150§C

Note: The ``Absolute Maximum Ratings'' are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the ``Electrical Characteristics'' table are not guaranteed at the absolute maximum ratings. The ``Recommended Operating Conditions'' table will define the conditions for actual device operation.

Recommended Operating Conditions

Symbol

Parameter

 

DM54LS240, 241

 

DM74LS240, 241

 

Units

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Min

Nom

 

Max

Min

 

Nom

Max

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC

 

Supply Voltage

 

 

4.5

5

 

5.5

4.75

 

5

 

5.25

 

 

 

V

VIH

 

High Level Input Voltage

 

2

 

 

 

 

2

 

 

 

 

 

 

 

 

V

VIL

 

Low Level Input Voltage

 

 

 

 

 

0.7

 

 

 

 

 

0.8

 

 

 

V

IOH

 

High Level Output Current

 

 

 

 

 

b12

 

 

 

 

 

b15

 

 

mA

IOL

 

Low Level Output Current

 

 

 

 

 

12

 

 

 

 

 

24

 

 

mA

TA

 

Free Air Operating Temperature

 

b55

 

 

 

125

0

 

 

 

 

70

 

 

§C

Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Symbol

 

Parameter

 

 

 

Conditions

 

 

 

 

Min

 

Typ

Max

 

Units

 

 

 

 

 

 

 

 

 

(Note 1)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VI

Input Clamp Voltage

VCC e Min, II e b18 mA

 

 

 

 

 

 

 

b1.5

 

V

HYS

Hysteresis (VTa b VTb)

VCC e Min

 

 

 

 

 

 

 

 

0.2

 

0.4

 

 

 

V

 

Data Inputs Only

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VOH

High Level Output Voltage

VCC e Min, VIH e Min

 

 

 

 

DM74

 

2.7

 

 

 

 

 

 

 

 

 

VIL e Max, IOH e b1 mA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC e Min, VIH e Min

 

 

 

 

DM54/DM74

 

2.4

 

3.4

 

 

 

V

 

 

 

VIL e Max, IOH e b3 mA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC e Min, VIH e Min

 

 

 

 

DM54/DM74

 

2

 

 

 

 

 

 

 

 

 

VIL e 0.5V, IOH e Max

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VOL

Low Level Output Voltage

VCC e Min

 

 

IOL e 12 mA

DM74

 

 

 

 

0.4

 

 

 

 

 

VIL e Max

 

 

IOL e Max

DM54

 

 

 

 

0.4

 

V

 

 

 

VIH e Min

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DM74

 

 

 

 

0.5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IOZH

Off-State Output Current,

VCC e Max

 

 

VO e 2.7V

 

 

 

 

 

 

20

 

mA

 

High Level Voltage Applied

VIL e Max

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IOZL

Off-State Output Current,

VIH e Min

 

 

VO e 0.4V

 

 

 

 

 

 

b20

 

mA

 

 

 

 

 

 

 

 

 

 

 

 

Low Level Voltage Applied

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

II

Input Current at Maximum

VCC e Max, VI e 7V (DM74)

 

 

 

 

 

 

 

0.1

 

mA

 

Input Voltage

VI e 10V (DM54)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IIH

High Level Input Current

VCC e Max, VI e 2.7V

 

 

 

 

 

 

 

 

 

 

20

 

mA

IIL

Low Level Input Current

VCC e Max, VI e 0.4V

 

 

 

 

 

 

 

 

 

 

b0.2

 

mA

IOS

Short Circuit Output Current

VCC e Max (Note 2)

 

 

 

 

 

 

 

b40

 

 

b225

mA

ICC

Supply Current

VCC e Max,

 

 

Outputs High

LS240, LS241

 

 

13

23

 

 

 

 

 

Outputs Open

 

 

Outputs Low

LS240

 

 

 

26

44

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LS241

 

 

 

27

46

 

mA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Outputs Disabled

LS240

 

 

 

29

50

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LS241

 

 

 

32

54

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Note 1: All typicals are at VCC e 5V, TA e 25§C.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second.

2

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