May 1999
LF147/LF347
Wide Bandwidth Quad JFET Input Operational Amplifiers
General Description
The LF147 is a low cost, high speed quad JFET input operational amplifier with an internally trimmed input offset voltage (BI-FET II™ technology). The device requires a low supply current and yet maintains a large gain bandwidth product and a fast slew rate. In addition, well matched high voltage JFET input devices provide very low input bias and offset currents. The LF147 is pin compatible with the standard LM148. This feature allows designers to immediately upgrade the overall performance of existing LF148 and LM124 designs.
The LF147 may be used in applications such as high speed integrators, fast D/A converters, sample-and-hold circuits and many other circuits requiring low input offset voltage, low input bias current, high input impedance, high slew rate and wide bandwidth. The device has low noise and offset voltage drift.
Features
nInternally trimmed offset voltage: 5 mV max
nLow input bias current: 50 pA
nLow input noise current:
nWide gain bandwidth: 4 MHz
nHigh slew rate: 13 V/µs
nLow supply current: 7.2 mA
nHigh input impedance: 1012Ω
nLow total harmonic distortion AV=10,: <0.02% RL=10k, VO=20 Vp-p, BW=20 Hz−20 kHz
nLow 1/f noise corner: 50 Hz
nFast settling time to 0.01%: 2 µs
Simplified Schematic |
Connection Diagram |
1¤4 Quad |
Dual-In-Line Package |
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DS005647-1 |
DS005647-13 |
Note 1: Available per SMD #8102306, JM38510/11906. |
Top View
Order Number LF147J, LF347M, LF347BN,
LF347N or LF147J/883 (Note 1)
See NS Package Number J14A, M14A or N14A
BI-FET II™ is a trademark of National Semiconductor Corporation.
Amplifiers Operational Input JFET Quad Bandwidth Wide LF147/LF347
© 1999 National Semiconductor Corporation |
DS005647 |
www.national.com |
Absolute Maximum Ratings (Note 2)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.
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LF147 |
LF347B/LF347 |
Supply Voltage |
±22V |
±18V |
Differential Input Voltage |
±38V |
±30V |
Input Voltage Range |
±19V |
±15V |
(Note 3) |
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Output Short Circuit |
Continuous |
Continuous |
Duration (Note 4) |
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Power Dissipation |
900 mW |
1000 mW |
(Notes 5, 11) |
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Tj max |
150ÊC |
150ÊC |
θjA |
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Ceramic DIP (J) Package |
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70ÊC/W |
Plastic DIP (N) Package |
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75ÊC/W |
Surface Mount Narrow (M) |
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100ÊC/W |
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LF147 |
LF347B/LF347 |
Surface Mount Wide (WM) |
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85ÊC/W |
Operating Temperature |
(Note 6) |
(Note 6) |
Range |
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Storage Temperature |
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Range |
−65ÊC ≤TA≤150ÊC |
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Lead Temperature |
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(Soldering, 10 sec.) |
260ÊC |
260ÊC |
Soldering Information |
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Dual-In-Line Package |
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Soldering (10 seconds) |
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260ÊC |
Small Outline Package |
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Vapor Phase (60 seconds) |
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215ÊC |
Infrared (15 seconds) |
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220ÊC |
See AN-450 ªSurface Mounting Methods and Their Effect on Product Reliabilityº for other methods of soldering surface mount devices.
ESD Tolerance (Note 12) |
900V |
DC Electrical Characteristics (Note 7)
Symbol |
Parameter |
Conditions |
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LF147 |
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LF347B |
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LF347 |
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Units |
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Min |
Typ |
Max |
Min |
Typ |
Max |
Min |
Typ |
Max |
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VOS |
Input Offset Voltage |
RS=10 kΩ, TA=25ÊC |
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1 |
5 |
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3 |
5 |
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5 |
10 |
mV |
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Over Temperature |
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8 |
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7 |
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13 |
mV |
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VOS/ T |
Average TC of Input Offset |
RS=10 kΩ |
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10 |
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10 |
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10 |
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µV/ÊC |
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Voltage |
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IOS |
Input Offset Current |
Tj=25ÊC, (Notes 7, 8) |
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25 |
100 |
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25 |
100 |
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25 |
100 |
pA |
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Over Temperature |
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25 |
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4 |
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4 |
nA |
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IB |
Input Bias Current |
Tj=25ÊC, (Notes 7, 8) |
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50 |
200 |
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50 |
200 |
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50 |
200 |
pA |
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Over Temperature |
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50 |
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8 |
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8 |
nA |
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RIN |
Input Resistance |
Tj=25ÊC |
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1012 |
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1012 |
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1012 |
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Ω |
AVOL |
Large Signal Voltage Gain |
VS=±15V, TA=25ÊC |
50 |
100 |
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50 |
100 |
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25 |
100 |
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V/mV |
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VO=±10V, RL=2 kΩ |
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Over Temperature |
25 |
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25 |
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15 |
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V/mV |
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VO |
Output Voltage Swing |
VS=±15V, RL=10 kΩ |
±12 |
±13.5 |
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±12 |
±13.5 |
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±12 |
±13.5 |
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V |
VCM |
Input Common-Mode Voltage |
VS=±15V |
±11 |
+15 |
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±11 |
+15 |
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±11 |
+15 |
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V |
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Range |
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−12 |
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−12 |
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−12 |
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V |
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CMRR |
Common-Mode Rejection Ratio |
RS≤10 kΩ |
80 |
100 |
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80 |
100 |
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70 |
100 |
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dB |
PSRR |
Supply Voltage Rejection Ratio |
(Note 9) |
80 |
100 |
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80 |
100 |
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70 |
100 |
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dB |
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IS |
Supply Current |
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7.2 |
11 |
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7.2 |
11 |
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7.2 |
11 |
mA |
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2 |
AC Electrical Characteristics (Note 7)
Symbol |
Parameter |
Conditions |
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LF147 |
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LF347B |
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LF347 |
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Units |
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Min |
Typ |
Max |
Min |
Typ |
Max |
Min |
Typ |
Max |
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Amplifier to Amplifier Coupling |
TA=25ÊC, |
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−120 |
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−120 |
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−120 |
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dB |
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f=1 Hz−20 kHz |
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(Input Referred) |
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SR |
Slew Rate |
VS=±15V, TA=25ÊC |
8 |
13 |
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8 |
13 |
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8 |
13 |
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V/µs |
GBW |
Gain-Bandwidth Product |
VS=±15V, TA=25ÊC |
2.2 |
4 |
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2.2 |
4 |
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2.2 |
4 |
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MHz |
en |
Equivalent Input Noise Voltage |
TA=25ÊC, RS=100Ω, |
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20 |
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20 |
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20 |
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f=1000 Hz |
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in |
Equivalent Input Noise Current |
Tj=25ÊC, f=1000 Hz |
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0.01 |
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0.01 |
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0.01 |
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Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits.
Note 3: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage.
Note 4: Any of the amplifier outputs can be shorted to ground indefinitely, however, more than one should not be simultaneously shorted as the maximum junction temperature will be exceeded.
Note 5: For operating at elevated temperature, these devices must be derated based on a thermal resistance of θjA.
Note 6: The LF147 is available in the military temperature range −55ÊC ≤TA≤125ÊC, while the LF347B and the LF347 are available in the commercial temperature range 0ÊC≤TA≤70ÊC. Junction temperature can rise to Tj max = 150ÊC.
Note 7: Unless otherwise specified the specifications apply over the full temperature range and for VS=±20V for the LF147 and for VS=±15V for the LF347B/LF347. VOS, IB, and IOS are measured at VCM=0.
Note 8: The input bias currents are junction leakage currents which approximately double for every 10ÊC increase in the junction temperature, Tj. Due to limited production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient temperature as a result of internal power dissipation, PD. Tj=TA+θjA PD where θjA is the thermal resistance from junction to ambient. Use of a heat sink is recommended if input bias current is to be kept to a minimum.
Note 9: Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice from VS = ± 5V to ±15V for the LF347 and LF347B and from VS = ±20V to ±5V for the LF147.
Note 10: Refer to RETS147X for LF147D and LF147J military specifications.
Note 11: Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate outside guaranteed limits.
Note 12: Human body model, 1.5 kΩ in series with 100 pF.
3 |
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Typical Performance Characteristics
Input Bias Current |
Input Bias Current |
Supply Current |
|
DS005647-14 |
DS005647-16 |
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DS005647-15 |
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Positive Common-Mode |
Negative Common-Mode |
Positive Current Limit |
Input Voltage Limit |
Input Voltage Limit |
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DS005647-19
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DS005647-17 |
DS005647-18 |
Negative Current Limit |
Output Voltage Swing |
Output Voltage Swing |
DS005647-20 |
DS005647-21 |
DS005647-22 |
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4 |