August 1986
Revised March 2000
DM74LS138 • DM74LS139
Decoder/Demultiplexer
General Description
These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding. When used with high-speed memories, the delay times of these decoders are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible.
The DM74LS138 decodes one-of-eight lines, based upon the conditions at the three binary select inputs and the three enable inputs. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented with no external inverters, and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications.
The DM74LS139 comprises two separate two-line-to-four- line decoders in a single package. The active-low enable input can be used as a data line in demultiplexing applications.
All of these decoders/demultiplexers feature fully buffered inputs, presenting only one normalized load to its driving circuit. All inputs are clamped with high-performance Schottky diodes to suppress line-ringing and simplify system design.
Features
■Designed specifically for high speed: Memory decoders
Data transmission systems
■DM74LS138 3-to-8-line decoders incorporates 3 enable inputs to simplify cascading and/or data reception
■DM74LS139 contains two fully independent 2-to-4-line decoders/demultiplexers
■Schottky clamped for high performance
■Typical propagation delay (3 levels of logic) DM74LS138 21 ns
DM74LS139 21 ns
■Typical power dissipation
DM74LS138 32 mW
DM74LS139 34 mW
Ordering Code:
Order Number |
Package Number |
Package Description |
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DM74LS138M |
M16A |
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow |
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DM74LS138SJ |
M16D |
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide |
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DM74LS138N |
N16E |
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide |
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DM74LS139M |
M16A |
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow |
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DM74LS139SJ |
M16D |
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide |
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DM74LS139N |
N16E |
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide |
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Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Decoder/Demultiplexer DM74LS139 • DM74LS138
© 2000 Fairchild Semiconductor Corporation |
DS006391 |
www.fairchildsemi.com |
DM74LS138 • DM74LS139
Connection Diagrams
DM74LS138 |
DM74LS139 |
Function Tables
DM74LS138 |
DM74LS139 |
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Inputs |
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Outputs |
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Enable |
Select |
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G1 |
G2 (Note 1) |
C |
B |
A |
YO |
Y1 |
Y2 |
Y3 |
Y4 |
Y5 |
Y6 |
Y7 |
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X |
H |
X |
X |
X |
H |
H |
H |
H |
H |
H |
H |
H |
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L |
X |
X |
X |
X |
H |
H |
H |
H |
H |
H |
H |
H |
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H |
L |
L |
L |
L |
L |
H |
H |
H |
H |
H |
H |
H |
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H |
L |
L |
L |
H |
H |
L |
H |
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H |
H |
H |
H |
H |
H |
L |
L |
H |
L |
H |
H |
L |
H |
H |
H |
H |
H |
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H |
L |
L |
H |
H |
H |
H |
H |
L |
H |
H |
H |
H |
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H |
L |
H |
L |
L |
H |
H |
H |
H |
L |
H |
H |
H |
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H |
L |
H |
L |
H |
H |
H |
H |
H |
H |
L |
H |
H |
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H |
L |
H |
H |
L |
H |
H |
H |
H |
H |
H |
L |
H |
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H |
L |
H |
H |
H |
H |
H |
H |
H |
H |
H |
H |
L |
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Inputs |
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Outputs |
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Enable |
Select |
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G |
B |
A |
Y0 |
Y1 |
Y2 |
Y3 |
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H |
X |
X |
H |
H |
H |
H |
L |
L |
L |
L |
H |
H |
H |
L |
L |
H |
H |
L |
H |
H |
L |
H |
L |
H |
H |
L |
H |
L |
H |
H |
H |
H |
H |
L |
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H = HIGH Level
L = LOW Level
X = Don’t Care
Note 1: G2 = G2A + G2B
Logic Diagrams
DM74LS138 |
DM74LS139 |
www.fairchildsemi.com |
2 |
Absolute Maximum Ratings(Note 2)
Supply Voltage |
7V |
Note 2: The “Absolute Maximum Ratings” are those values beyond which |
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the safety of the device cannot be guaranteed. The device should not be |
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Input Voltage |
7V |
operated at these limits. The parametric values defined in the Electrical |
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Characteristics tables are not guaranteed at the absolute maximum ratings. |
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Operating Free Air Temperature Range |
0°C to +70°C |
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The “Recommended Operating Conditions” table will define the conditions |
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Storage Temperature Range |
−65°C to +150°C |
for actual device operation. |
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DM74LS138 Recommended Operating Conditions
Symbol |
Parameter |
Min |
Nom |
Max |
Units |
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VCC |
Supply Voltage |
4.75 |
5 |
5.25 |
V |
VIH |
HIGH Level Input Voltage |
2 |
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V |
VIL |
LOW Level Input Voltage |
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0.8 |
V |
IOH |
HIGH Level Output Current |
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−0.4 |
mA |
IOL |
LOW Level Output Current |
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8 |
mA |
TA |
Free Air Operating Temperature |
0 |
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70 |
°C |
DM74LS138 Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol |
Parameter |
Conditions |
Min |
Typ |
Max |
Units |
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(Note 3) |
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VI |
Input Clamp Voltage |
VCC = Min, II = −18 mA |
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−1.5 |
V |
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VOH |
HIGH Level Output Voltage |
VCC = Min, IOH = Max, VIL = Max, VIH = Min |
2.7 |
3.4 |
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V |
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VOL |
LOW Level |
VCC = Min, IOL = Max, VIL = Max, VIH = Min |
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0.35 |
0.5 |
V |
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Output Voltage |
IOL = 4 mA, VCC = Min |
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0.25 |
0.4 |
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II |
Input Current @ Max Input Voltage |
VCC = Max, VI = 7V |
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0.1 |
mA |
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IIH |
HIGH Level Input Current |
VCC = Max, VI = 2.7V |
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20 |
μA |
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IIL |
LOW Level Input Current |
VCC = Max, VI = 0.4V |
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−0.36 |
mA |
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IOS |
Short Circuit Output Current |
VCC = Max (Note 4) |
−20 |
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−100 |
mA |
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ICC |
Supply Current |
VCC = Max (Note 5) |
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6.3 |
10 |
mA |
Note 3: All typicals are at VCC = 5V, TA = 25°C.
Note 4: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 5: ICC is measured with all outputs enabled and OPEN.
DM74LS138 Switching Characteristics
at VCC = 5V and TA = 25°C |
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From (Input) |
Levels |
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RL = 2 kΩ |
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Symbol |
Parameter |
To (Output) |
of Delay |
CL = 15 pF |
CL = 50 pF |
Units |
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Min |
Max |
Min |
Max |
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tPLH |
Propagation Delay Time |
Select to Output |
2 |
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18 |
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27 |
ns |
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LOW-to-HIGH Level Output |
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tPHL |
Propagation Delay Time |
Select to Output |
2 |
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27 |
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40 |
ns |
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HIGH-to-LOW Level Output |
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tPLH |
Propagation Delay Time |
Select to Output |
3 |
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18 |
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27 |
ns |
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LOW-to-HIGH Level Output |
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tPHL |
Propagation Delay Time |
Select to Output |
3 |
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27 |
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40 |
ns |
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HIGH-to-LOW Level Output |
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tPLH |
Propagation Delay Time |
Enable to Output |
2 |
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18 |
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27 |
ns |
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LOW-to-HIGH Level Output |
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tPHL |
Propagation Delay Time |
Enable to Output |
2 |
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24 |
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40 |
ns |
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HIGH-to-LOW Level Output |
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tPLH |
Propagation Delay Time |
Enable to Output |
3 |
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18 |
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27 |
ns |
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LOW-to-HIGH Level Output |
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tPHL |
Propagation Delay Time |
Enable to Output |
3 |
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28 |
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40 |
ns |
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HIGH-to-LOW Level Output |
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DM74LS139 • DM74LS138
3 |
www.fairchildsemi.com |