August 1986
Revised March 2000
DM74LS251
3-STATE 1-of-8 Line Data Selector/Multiplexer
General Description
These data selectors/multiplexers contain full on-chip binary decoding to select one-of-eight data sources, and feature a strobe-controlled 3-STATE output. The strobe must be at a low logic level to enable these devices. The 3- STATE outputs permit direct connection to a common bus. When the strobe input is HIGH, both outputs are in a highimpedance state in which both the upper and lower transistors of each totem-pole output are OFF, and the output neither drives nor loads the bus significantly. When the strobe is LOW, the outputs are activated and operate as standard TTL totem-pole outputs.
To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels, the output control circuitry is designed so that the average output disable time is shorter than the average output enable time.
Features
■3-STATE version of DM74LS151
■Interface directly with system bus
■Perform parallel-to-serial conversion
■Permit multiplexing from N-lines to one line
■Complementary outputs provide true and inverted data
■Maximum number of common outputs: 129
■Typical propagation delay time (D to Y): 17 ns
■Typical power dissipation: 35 mW
Ordering Code:
Order Number |
Package Number |
Package Description |
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DM74LS251M |
M16A |
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow |
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DM74LS251N |
N16E |
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide |
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Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram |
Function Table |
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Inputs |
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Outputs |
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Select |
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Strobe |
Y |
W |
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C |
B |
A |
S |
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X |
X |
X |
H |
Z |
Z |
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L |
L |
L |
L |
D0 |
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D0 |
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L |
L |
H |
L |
D1 |
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D1 |
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L |
H |
L |
L |
D2 |
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D2 |
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L |
H |
H |
L |
D3 |
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D3 |
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H |
L |
L |
L |
D4 |
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D4 |
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H |
L |
H |
L |
D5 |
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D5 |
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H |
H |
L |
L |
D6 |
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D6 |
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H |
H |
H |
L |
D7 |
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D7 |
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H |
= HIGH Logic Level |
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L = LOW Logic Level |
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X = Don't Care |
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Z = High Impedance (OFF) |
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D0, D1…D7 = The level of the respective D input |
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Selector/Multiplexer Data Line 8-of-1 STATE-3 DM74LS251
© 2000 Fairchild Semiconductor Corporation |
DS006415 |
www.fairchildsemi.com |
DM74LS251
Logic Diagram
www.fairchildsemi.com |
2 |
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