Philips PCD3311CP, PCD3311CT, PCD3312CP, PCD3312CT Datasheet

INTEGRATED CIRCUITS

PCD3311C; PCD3312C

DTMF/modem/musical-tone generators

Product specification

1996 Nov 21

Supersedes data of May 1990

File under Integrated Circuits, IC03

	Philips Semiconductors			Product specification
		DTMF/modem/musical-tone generators		PCD3311C; PCD3312C
	CONTENTS		15	DEFINITIONS
	1	FEATURES	16	LIFE SUPPORT APPLICATIONS
			17	PURCHASE OF PHILIPS I2C COMPONENTS
	2	GENERAL DESCRIPTION
	3	QUICK REFERENCE DATA
	4	ORDERING INFORMATION
	5	BLOCK DIAGRAM
	6	PINNING INFORMATION

6.1Pinning PCD3311CP

6.2Pin description PCD3311CP

6.3Pinning PCD3311CT

6.4Pin description PCD3311CT

6.5Pinning PCD3312C

6.6Pin description PCD3312C

7	FUNCTIONAL DESCRIPTION

7.1General

7.2Clock/oscillator connection

7.3Mode selection (PCD3311C)

7.4Data inputs (PCD3311C)

7.5Strobe input (PCD3311C )

7.6I2C-bus clock and data inputs

7.7Address input

7.8I2C-bus data configuration

7.9Tone output

7.10Power-on reset

7.11Tables of Input and output

8	I2C-BUS INTERFACE

8.1Bit transfer

8.2Start and stop conditions

8.3System configuration

8.4Acknowledge

8.5Timing specifications

8.5.1Standard mode

8.5.2Low-speed mode

9HANDLING

10LIMITING VALUES

11CHARACTERISTICS

12APPLICATION INFORMATION

13PACKAGE OUTLINES

14SOLDERING

14.1Introduction

14.2DIP

14.2.1Soldering by dipping or by wave

14.2.2 Repairing soldered joints

14.3SO

14.3.1Reflow soldering

14.3.2 Wave soldering

14.3.3Repairing soldered joints

1996 Nov 21

2

Philips Semiconductors	Product specification
DTMF/modem/musical-tone generators	PCD3311C; PCD3312C

1 FEATURES

∙DTMF, modem and musical tone generation

∙Stabilized output voltage level

∙Low output distortion with on-chip filtering conforming to CEPT recommendations

∙Latched inputs for data bus applications

∙I2C-bus compatible

∙Selection of parallel or serial (I2C-bus) data input (PCD3311C).

2 GENERAL DESCRIPTION

The PCD3311C and PCD3312C are single-chip silicon gate CMOS integrated circuits. They are intended principally for use in telephone sets to provide the dual-tone multi-frequency (DTMF) combinations required for tone dialling systems. The various audio output frequencies are generated from an on-chip 3.58 MHz quartz crystal-controlled oscillator. A separate crystal is

3 QUICK REFERENCE DATA

used, and a separate microcontroller is required to control the devices.

Both the devices can interface to I2C-bus compatible microcontrollers for serial input. The PCD3311C can also interface directly to all standard microcontrollers, accepting a binary coded parallel input.

With their on-chip voltage reference the PCD3311C and PCD3312C provide constant output amplitudes which are independent of the operating supply voltage and ambient temperature.

An on-chip filtering system assures a very low total harmonic distortion in accordance with CEPT recommendations.

In addition to the standard DTMF frequencies the devices can also provide:

∙Twelve standard frequencies used in simplex modem applications for data rates from 300 to 1200 bits per second

∙Two octaves of musical scales in steps of semitones.

SYMBOL	PARAMETER	MIN.	TYP.	MAX.	UNIT
VDD	operating supply voltage	2.5	−	6.0	V
IDD	operating supply current	−	−	0.9	mA
Istb	standby current	−	−	3	μA
VHG(RMS)	DTMF HIGH group output voltage level (RMS value)	158	192	205	mV
VLG(RMS)	DTMF LOW group output voltage level (RMS value)	125	150	160	mV
Gv	pre-emphasis (voltage gain) of group	1.85	2.10	2.35	dB
THD	total harmonic distortion	−	−25	−	dB
Tamb	operating ambient temperature	−25	−	+70	°C

4 ORDERING INFORMATION

	TYPE NUMBER		PACKAGE
		NAME	DESCRIPTION	VERSION
	PCD3311CP	DIP14	plastic dual in-line package; 14 leads (300 mil)	SOT27-1
	PCD3311CT	SO16	plastic small outline package; 16 leads; body width 7.5 mm	SOT162-1
	PCD3312CP	DIP8	plastic dual in-line package; 8 leads (300 mil)	SOT97-1
	PCD3312CT	SO8	plastic small outline package; 8 leads; body width 7.5 mm	SOT176-1

1996 Nov 21

3

Philips Semiconductors	Product specification
DTMF/modem/musical-tone generators	PCD3311C; PCD3312C

5 BLOCK DIAGRAM

	OSCI	OSCO				VDD	VSS
	1(3)	2(4)				14(2)	13(1)
	OSCILLATOR		CLOCK
			GENERATOR
3			HIGH
MODE
			GROUP
4			DIVIDER		DAC
D5					HIGH
12
D4				SWITCHED
11
	INPUT		DIVIDER	CAPACITOR			(5)6
D3
10	CONTROL	SELECTION		BANDGAP			TONE
D2	LOGIC		(ROM)	VOLTAGE	ADDER
9(8)				REFERENCE		SWITCHED	RESISTOR
D1/SDA
						CAPACITOR	CAPACITOR
8(7)					DAC
D0/SCL			LOW
					LOW
5			GROUP			PCD3311C
			DIVIDER
STROBE						PCD3312C
	7(6)
	A0						MGG543

The un-parenthesised numbers are for the PCD3311CP, those in parenthesis for the PCD3312C.

					Fig.1	Block diagram.
6	PINNING INFORMATION							6.2 Pin description PCD3311CP
6.1	Pinning PCD3311CP
								SYMBOL	PIN	TYPE	DESCRIPTION
								OSCI	1	I	oscillator input
								OSCO	2	O	oscillator output
								MODE	3	I	mode select input (selects
handbook, halfpage					VDD						I2C or parallel data input)
	OSCI	1		14				D5	4	I	parallel data input
	OSCO	2		13	VSS			STROBE	5	I	strobe input (for loading
	MODE	3		12	D4						data in parallel mode)
	D5	4	PCD3311CP	11	D3			TONE	6	O	frequency output (DTMF,
											modem, musical tones)
	STROBE	5		10	D2
								A0	7	I	slave address input (to be
	TONE	6		9	D1/SDA						connected to VDD or VSS)
	A0	7		8	D0/SCL			D0/SCL	8	I	parallel data input or
											I2C-bus clock line
			MGG508
								D1/SDA	9	I	parallel data input or
											I2C-bus data line
								D2 − D4	10 − 12	I	parallel data inputs
	Fig.2 Pin configuration PCD3311CP.							VSS	13	P	negative supply
								VDD	14	P	positive supply

1996 Nov 21

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Philips Semiconductors	Product specification
DTMF/modem/musical-tone generators	PCD3311C; PCD3312C

6.3Pinning PCD3311CT

handbook, halfpage				VDD
OSCI	1		16
OSCO				VSS
	2		15
				D4
MODE	3		14
D5
	4	PCD3311CT	13	n.c.
				D3
n.c.	5		12
				D2
STROBE	6		11
				D1/SDA
TONE	7		10
A0				D0/SCL
	8		9
		MGG509

Fig.3 Pin configuration PCD3311CT.

6.5Pinning PCD3312C

handbook, halfpage
VSS	1		8	SDA
VDD				SCL
	2	PCD3312C	7
				A0
OSCI	3		6
				TONE
OSCO	4		5
		MGG510

6.4Pin description PCD3311CT

SYMBOL	PIN	TYPE	DESCRIPTION
OSCI	1	I	oscillator input
OSCO	2	O	oscillator output
MODE	3	I	mode select input (selects
			I2C or parallel data input)
D5	4	I	parallel data input
n.c.	5	−	not connected
STROBE	6	I	strobe input (for loading
			data in parallel mode)
TONE	7	O	frequency output (DTMF,
			modem, musical tones)
A0	8	I	slave address input (to be
			connected to VDD or VSS)
D0/SCL	9	I	parallel data input or
			I2C-bus clock line
D1/SDA	10	I	parallel data input or
			I2C-bus data line
D2, D3	11, 12	I	parallel data inputs
n.c.	13	−	not connected
D4	14	I	parallel data input
VSS	15	P	negative supply
VDD	16	P	positive supply

6.6Pin description PCD3312C

SYMBOL	PIN	TYPE	DESCRIPTION
VSS	1	P	negative supply
VDD	2	P	positive supply
OSCI	3	I	oscillator input
OSCO	4	O	oscillator output
TONE	5	O	frequency output (DTMF,
			modem, musical tones)
A0	6	I	slave address input (to be
			connected to VDD or VSS)
SCL	7	I	I2C-bus clock line
SDA	8	I	I2C-bus data line

Fig.4 Pin configuration PCD3312C.

1996 Nov 21

5

Philips Semiconductors	Product specification
DTMF/modem/musical-tone generators	PCD3311C; PCD3312C

7 FUNCTIONAL DESCRIPTION

7.1General (see Fig.1)

The Input Control Logic decodes the input data to determine whether DTMF, modem or musical tones are selected; and which particular tone or combination of tones is required.

A code representing the required tones is sent to the Divider Selection ROM which selects the correct division ratio in both of the Frequency Dividers (or in one divider, if only a single tone is required).

The Oscillator circuit provides a square wave of frequency 3.58 MHz. Each Frequency Divider divides the frequency of the Oscillator to give a serial digital square wave with a frequency simply related to that of the required tone.

The output from each Frequency Divider goes to a DAC, which is also fed by a clock derived from the oscillator. Using these two signals, the DAC produces an approximate sine wave of the required frequency, with an amplitude derived from the Voltage Reference.

The output from the DAC goes to an Adder where, for DTMF, it is combined with the output from the other DAC.

The output from the Adder goes through two stages of Low Pass Filters to give a smoothed tone (single or dual), and finally to the TONE output.

7.2Clock/oscillator connection

The timebase for the PCD3311C and PCD3312C is a crystal-controlled oscillator, requiring a 3.58 MHz quartz crystal to be connected between OSCI and OSCO. Alternatively, the OSCI input can be driven from an external clock of 3.58 MHz.

7.3Mode selection (PCD3311C)

The MODE input selects the data input mode for the PCD3311C. When MODE is connected to VDD (HIGH), data can be received in the parallel mode. When connected to VSS (LOW) or left open, data can be received via the serial I2C-bus.

PCD 3312C has no MODE input as data input is via the I2C-bus only.

7.4Data inputs (PCD3311C)

Inputs D0, D1, D2, D3, D4 and D5 are used in the parallel data input mode of the PCD3311C. Inputs D0 and D1 are also used in serial input mode when they act as the SCL and SDA inputs respectively. Inputs D0 and D1 have no internal pull-down or pull-up resistors and must not be left open in any application. Inputs D2, D3, D4 and D5 have internal pull-down.

D4 and D5 are used to select between DTMF dual, DTMF single, modem and musical tones (see Table 1). D0, D1, D2 and D3 select the tone combination or single tone within the selected application. They also, in combination with D4, select the standby mode. See Tables 2, 3, 4 and 5.

PCD 3312C has no parallel data pins as data input is via the I2C-bus.

Table 1 Use of D5 and D4 to select application

D5	D4	APPLICATION
LOW	LOW	DTMF single tones; musical tones;
		standby
LOW	HIGH	DTMF dual tones (all 16 combinations)
HIGH	LOW	modem tones
HIGH	HIGH	musical tones

7.5Strobe input (PCD3311C )

The STROBE input (with internal pull-down) allows the loading of parallel data into D0 to D5 when MODE is HIGH.

The data inputs must be stable preceding the positive-going edge of the strobe pulse (active HIGH). Input data are loaded at the negative-going edge of the strobe pulse and then the corresponding tone (or standby mode) is provided at the TONE output. The output remains unchanged until the negative-going edge of the next STROBE pulse (for new data) is received. Figure 5 is an example of the timing relationship between STROBE and the data inputs.

When MODE is LOW, data is received serially via the I2C-bus.

1996 Nov 21

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Philips Semiconductors	Product specification
DTMF/modem/musical-tone generators	PCD3311C; PCD3312C

tSPW

	STROBE	90%
		10%
		tDH
		tDS
	D0
	D1
	D2
	D3
	D4
	D5
	TONE
		oscillator OFF
		MGG511

ttone (ON)
oscillator ON	oscillator ON
no output tone	output tones

Fig.5 Timing of STROBE, parallel data inputs and TONE output (770 Hz + 1477 Hz in example) in the parallel mode (MODE = HIGH).

7.6I2C-bus clock and data inputs

SCL and SDA are the serial clock and serial data inputs according to the I2C-bus specification, see Chapter 8. SCL and SDA must be pulled up externally to VDD.

For the PCD3311C, SCL and SDA are combined with parallel inputs D0 and D1 respectively - D0/SCL and D1/SDA operate serially only when MODE is LOW.

7.7Address input

Address input A0 defines the least significant bit of the I2C-bus address of the device (see Fig.6). The first 6 bits of the address are fixed internally. By tying the A0 of each device to VDD (HIGH) and VSS (LOW) respectively, two different PCD3311C or PCD3312C devices can be individually addressed on the bus.

Whether one or two devices are used, A0 must be connected to VDD or VSS.

7.8I2C-bus data configuration (see Fig.6)

The PCD3311C and PCD3312C are always slave

receivers in the I2C-bus configuration. The R/W bit in is thus always LOW, indicating that the master (microcontroller) is writing.

The slave address in the serial mode consists of 7 bits: 6 bits internally fixed, 1 externally set via A0. in the serial mode, the same input data codes are used as in the parallel mode. See Tables 2, 3, 4 and 5.

7.9Tone output

The single and dual tones provided at the TONE output are first filtered by an on-chip switched-capacitor filter, followed by an active RC low-pass filter. The filtered tones fulfil the CEPT recommendations for total harmonic distortion of DTMF tones. An on-chip reference voltage provides output tone levels independent of the supply voltage. Tables 3, 4 and 5 give the frequency deviation of the output tones with respect to the standard DTMF, modem and music frequencies.

1996 Nov 21

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Philips Semiconductors	Product specification
DTMF/modem/musical-tone generators	PCD3311C; PCD3312C

acknowledge

acknowledge

from slave

from slave

MSB

R/W

S

0

1

0

0

1

0

A0

0

A

X

X

D5

D4

D3

D2

D1

D0

A

P

slave address

data

internal STROBE

MGG512

for data latching

Fig.6 I2C-bus data format.

7.10Power-on reset

In order to avoid an undefined state when the power is switched ON, the devices have an internal reset circuit which sets the standby mode (oscillator OFF).

7.11TABLES OF INPUT AND OUTPUT

The specified output tones are obtained when a 3.579545 MHz crystal is used.

In each table, the logical states for the input data lines are related to voltage levels as follows: 1 = HIGH = VDD

0 = LOW = VSS

X = don’t care

Table 2 Input data for no output tone, TONE in 3-state

D5	D4	D3	D2	D1	D0	HEX(1)	OSCILLATOR
X	0	0	0	0	0	00 or 20	ON
X	0	0	0	0	1	01 or 21	OFF
X	0	0	0	1	0	02 or 22	OFF
X	0	0	0	1	1	03 or 23	OFF

Note

1. The alternative HEX values depend on the value of D5.

1996 Nov 21

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Philips Semiconductors																						Product specification
DTMF/modem/musical-tone generators																	PCD3311C; PCD3312C
Table 3 Input data and output for DTMF tones
																	STANDARD				TONE		FREQUENCY
																				OUTPUT
D5		D4		D3		D2		D1		D0			HEX			SYMBOL	FREQUENCY						DEVIATION
																				FREQ.
																	Hz					Hz	%	Hz
0		0		1		0		0		0				08		−	697			697.90			+0.13	+0.90
0		0		1		0		0		1				09		−	770			770.46			+0.06	+0.46
0		0		1		0		1		0				0A		−	852			850.45			−0.18	−1.55
0		0		1		0		1		1				0B		−	941			943.23			+0.24	+2.23
0		0		1		1		0		0				0C		−	1209			1206.45			−0.21	−2.55
0		0		1		1		0		1				0D		−	1336			1341.66			+0.42	+5.66
0		0		1		1		1		0				0E		−	1477			1482.21			+0.35	+5.21
0		0		1		1		1		1				0F		−	1633			1638.24			+0.32	+5.24
0		1		0		0		0		0				10		0	941+1336					−	−	−
0		1		0		0		0		1				11		1	697+1209					−	−	−
0		1		0		0		1		0				12		2	697+1336					−	−	−
0		1		0		0		1		1				13		3	697+1477					−	−	−
0		1		0		1		0		0				14		4	770+1209					−	−	−
0		1		0		1		0		1				15		5	770+1336					−	−	−
0		1		0		1		1		0				16		6	770+1477					−	−	−
0		1		0		1		1		1				17		7	852+1209					−	−	−
0		1		1		0		0		0				18		8	852+1336					−	−	−
0		1		1		0		0		1				19		9	852+1477					−	−	−
0		1		1		0		1		0				1A		A	697+1633					−	−	−
0		1		1		0		1		1				1B		B	770+1633					−	−	−
0		1		1		1		0		0				1C		C	852+1633					−	−	−
0		1		1		1		0		1				1D		D	941+1633					−	−	−
0		1		1		1		1		0				1E		*	941+1209					−	−	−
0		1		1		1		1		1				1F		#	941+1477					−	−	−
Table 4 Input data and output for modem tones
															STANDARD		TONE	FREQUENCY
																	OUTPUT						TELECOM.
D5		D4		D3		D2		D1	D0			HEX			FREQUENCY			DEVIATION
																	FREQ.
																							STANDARD
																Hz	Hz	%				Hz
1		0		0		1		0	0			24				1300	1296.94	−0.24				−3.06	V.23
1		0		0		1		0	1			25				2100	2103.14	+0.15				+3.14
1		0		0		1		1	0			26				1200	1197.17	−0.24				−2.83	Bell 202
1		0		0		1		1	1			27				2200	2192.01	−0.36				−7.99
1		0		1		0		0	0			28				980	978.82	−0.12				−1.18	V.21
1		0		1		0		0	1			29				1180	1179.03	−0.08				−0.97

1996 Nov 21

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