Philips PCF8576CU-5-F1, PCF8576CU-7-F1, PCF8576CU-F1, PCF8576CU-10-F1, PCF8576CU-12-F1 Datasheet

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INTEGRATED CIRCUITS

DATA SHEET

PCF8576C

Universal LCD driver for low multiplex rates

Product specification

1998 Jul 30

Supersedes data of 1997 Nov 14

File under Integrated Circuits, IC12

Philips Semiconductors Product specification

 

Universal LCD driver for low multiplex

PCF8576C

 

rates

 

 

 

 

 

 

 

 

 

 

CONTENTS

8

LIMITING VALUES

1

FEATURES

9

HANDLING

10

DC CHARACTERISTICS

2

GENERAL DESCRIPTION

11

AC CHARACTERISTICS

3

ORDERING INFORMATION

11.1

Typical supply current characteristics

4

BLOCK DIAGRAM

11.2

Typical characteristics of LC D outputs

5

PINNING

12

APPLICATION INFORMATION

6

FUNCTIONAL DESCRIPTION

12.1

Chip-on-glass cascadability in single plane

 

 

6.1Power-on reset

6.2LCD bias generator

6.3LCD voltage selector

6.4LCD drive mode waveforms

6.4.1Static drive mode

6.4.21 : 2 multiplex drive mode

6.4.31 : 3 multiplex drive mode

6.4.41 : 4 multiplex drive mode

6.5Oscillator

6.5.1Internal clock

6.5.2External clock

6.6Timing

6.7Display latch

6.8Shift register

6.9Segment outputs

6.10Backplane outputs

6.11Display RAM

6.12Data pointer

6.13Subaddress counter

6.14Output bank selector

6.15Input bank selector

6.16Blinker

13BONDING PAD LOCATIONS

14PACKAGE OUTLINES

15SOLDERING

15.1Introduction

15.2Reflow soldering

15.3Wave soldering

15.3.1LQFP

15.3.2VSO

15.3.3Method (LQFP and VSO)

15.4Repairing soldered joints

16DEFINITIONS

17LIFE SUPPORT APPLICATIONS

18PURCHASE OF PHILIPS I2C COMPONENTS

7

CHARACTERISTICS OF THE I2C-BUS

7.1Bit transfer (see Fig.12)

7.2Start and stop conditions (see Fig.13)

7.3System configuration (see Fig.14)

7.4Acknowledge (see Fig.15)

7.5PCF8576C I2C-bus controller

7.6Input filters

7.7I2C-bus protocol

7.8Command decoder

7.9Display controller

7.10Cascaded operation

1998 Jul 30

2

Philips Semiconductors

Product specification

 

 

Universal LCD driver for low multiplex

PCF8576C

rates

1 FEATURES

Single-chip LCD controller/driver

Selectable backplane drive configuration: static or 2/3/4 backplane multiplexing

Selectable display bias configuration: static, 1/2 or 1/3

Internal LCD bias generation with voltage-follower buffers

40 segment drives: up to twenty 8-segment numeric characters; up to ten 15-segment alphanumeric characters; or any graphics of up to 160 elements

40 × 4-bit RAM for display data storage

Auto-incremented display data loading across device subaddress boundaries

Display memory bank switching in static and duplex drive modes

Versatile blinking modes

LCD and logic supplies may be separated

Wide power supply range: from 2 V for low-threshold LCDs and up to 6 V for guest-host LCDs and high-threshold (automobile) twisted nematic LCDs.

A 9 V version is also available on request.

Low power consumption

Power-saving mode for extremely low power consumption in battery-operated and telephone applications

I2C-bus interface

TTL/CMOS compatible

Compatible with any 4-bit, 8-bit or 16-bit microprocessors/microcontrollers

May be cascaded for large LCD applications (up to 2560 segments possible)

Cascadable with 24-segment LCD driver PCF8566

Optimized pinning for plane wiring in both and multiple PCF8576C applications

Space-saving 56-lead plastic very small outline package (VSO56) or 64-lead low profile quad flat package (LQFP64)

No external components

Compatible with chip-on-glass technology

Manufactured in silicon gate CMOS process.

2 GENERAL DESCRIPTION

The PCF8576C is a peripheral device which interfaces to almost any Liquid Crystal Display (LCD) with low multiplex rates. It generates the drive signals for any static or multiplexed LCD containing up to four backplanes and up to 40 segments and can easily be cascaded for larger LCD applications. The PCF8576C is compatible with most microprocessors/microcontrollers and communicates via a two-line bidirectional I2C-bus. Communication overheads are minimized by a display RAM with auto-incremented addressing, by hardware subaddressing and by display memory switching (static and duplex drive modes).

3 ORDERING INFORMATION

TYPE NUMBER

 

PACKAGE

 

 

 

 

NAME

DESCRIPTION

VERSION

 

 

 

 

 

PCF8576CT

VSO56

plastic very small outline package; 56 leads

SOT190-1

 

 

 

 

PCF8576CU

chip in tray

 

 

 

 

PCF8576CU/2

chip with bumps in tray

 

 

 

 

PCF8576CU/5

unsawn wafer

 

 

 

 

PCF8576CU/7

chip with bumps on tape

 

 

 

 

PCF8576CU/10

FFC

chip-on-film frame carrier

 

 

 

 

PCF8576CU/12

FFC

chip with bumps on film frame carrier

 

 

 

 

PCF8576CH

LQFP64

plastic low profile quad flat package; 64 leads; body 10 × 10 × 1.4 mm

SOT314-2

 

 

 

 

1998 Jul 30

3

Philips PCF8576CU-5-F1, PCF8576CU-7-F1, PCF8576CU-F1, PCF8576CU-10-F1, PCF8576CU-12-F1 Datasheet

_

30 Jul 1998

4

 

 

 

 

 

 

 

 

 

 

4

 

 

 

 

 

 

 

 

 

 

BLOCK

 

 

 

13

14

15

16

17 to 56

 

 

DIAGRAM

 

 

 

BP0 BP2 BP1 BP3

S0 to S39

 

 

 

 

 

 

 

 

 

 

40

 

 

 

5

 

 

BACKPLANE

 

 

 

 

 

VDD

 

 

DISPLAY SEGMENT OUTPUTS

 

 

 

 

 

OUTPUTS

 

 

 

 

 

 

 

 

 

 

 

 

LCD

 

 

 

 

DISPLAY LATCH

 

 

 

 

 

VOLTAGE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SELECTOR

 

 

 

 

 

 

 

 

 

LCD BIAS

 

 

 

 

 

SHIFT REGISTER

 

 

 

 

GENERATOR

 

 

 

 

 

 

 

 

12

 

 

 

 

 

 

 

 

 

VLCD

 

 

 

 

 

 

 

 

 

 

4

 

 

PCF8576C

INPUT

DISPLAY

OUTPUT

 

CLK

TIMING

BLINKER

 

 

 

 

3

 

 

 

BANK

RAM

BANK

 

SYNC

 

 

 

 

 

SELECTOR

40 x 4 BITS

SELECTOR

 

 

 

 

 

 

 

 

 

DISPLAY

 

 

 

 

 

 

 

 

 

CONTROLLER

 

 

 

 

 

 

6

OSCILLATOR

POWER-

 

 

 

 

 

 

 

 

OSC

 

 

 

 

DATA

 

 

 

 

 

ON

 

 

 

 

 

 

 

 

 

 

 

 

 

POINTER

 

 

 

 

 

RESET

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

11

 

 

COMMAND

 

 

 

 

 

 

VSS

 

 

DECODER

 

 

 

 

 

 

2

 

 

 

 

 

 

 

 

SUB-

 

SCL

INPUT

I2C - BUS

 

 

 

 

 

ADDRESS

1

FILTERS

CONTROLLER

 

 

 

 

 

COUNTER

SDA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

10

 

 

 

 

 

7

8

9

 

 

SA0

 

 

 

 

 

A0

A1

A2

 

 

 

 

 

 

 

 

 

 

MLD332

Fig.1 Block diagram;handbook,fullpagewidth

VSO56.

multiplex low for driver LCD Universal rates

PCF8576C

Semiconductors Philips

specification Product

Philips Semiconductors

Product specification

 

 

Universal LCD driver for low multiplex

PCF8576C

rates

5 PINNING

 

SYMBOL

 

PIN

DESCRIPTION

 

 

 

 

SOT190

SOT314

 

 

 

 

 

 

 

 

 

 

SDA

1

10

I2C-bus serial data input/output

 

SCL

2

11

I2C-bus serial clock input

 

 

 

3

12

cascade synchronization input/output

 

SYNC

 

 

 

 

 

 

 

CLK

4

13

external clock input

 

 

 

 

 

 

VDD

5

14

supply voltage

 

OSC

6

15

oscillator input

 

 

 

 

 

 

A0 to A2

7 to 9

16 to 18

I2C-bus subaddress inputs

 

SA0

10

19

I2C-bus slave address input; bit 0

 

VSS

11

20

logic ground

 

VLCD

12

21

LCD supply voltage

 

BP0, BP2, BP1, BP3

13 to 16

25 to 28

LCD backplane outputs

 

 

 

 

 

 

S0 to S39

17 to 56

29 to 32, 34 to 47, 49 to 64, 2 to 7

LCD segment outputs

 

 

 

 

 

 

n.c.

1, 8, 9, 22 to 24, 33 and 48

not connected

 

 

 

 

 

 

1998 Jul 30

5

Philips Semiconductors

Product specification

 

 

Universal LCD driver for low multiplex

PCF8576C

rates

 

 

 

 

 

 

SDA

1

 

56

S39

 

 

 

 

 

 

SCL

2

 

55

S38

 

 

 

 

 

 

SYNC

3

 

54

S37

 

 

 

 

 

 

CLK

4

 

53

S36

VDD

 

 

 

 

5

 

52

S35

 

 

 

 

 

 

OSC

6

 

51

S34

 

 

 

 

 

 

A0

7

 

50

S33

 

 

 

 

 

 

A1

8

 

49

S32

 

 

 

 

 

 

A2

9

 

48

S31

 

 

 

 

 

 

SA0

10

 

47

S30

VSS

 

 

 

 

11

 

46

S29

VLCD

 

 

 

 

12

 

45

S28

 

 

 

 

 

 

BP0

13

 

44

S27

 

 

 

 

 

 

BP2

14

PCF8576CT

43

S26

 

 

 

 

 

BP1

15

 

42

S25

 

 

 

 

 

 

BP3

16

 

41

S24

 

 

 

 

 

 

S0

17

 

40

S23

 

 

 

 

 

 

S1

18

 

39

S22

 

 

 

 

 

 

S2

19

 

38

S21

 

 

 

 

 

 

S3

20

 

37

S20

 

 

 

 

 

 

S4

21

 

36

S19

 

 

 

 

 

 

S5

22

 

35

S18

 

 

 

 

 

 

S6

23

 

34

S17

 

 

 

 

 

 

S7

24

 

33

S16

 

 

 

 

 

 

S8

25

 

32

S15

 

 

 

 

 

 

S9

26

 

31

S14

 

 

 

 

 

 

S10

27

 

30

S13

 

 

 

 

 

 

S11

28

 

29

S12

 

 

 

 

 

 

 

 

 

MLD334

 

Fig.2 Pin configuration; VSO56.

1998 Jul 30

6

Philips Semiconductors

Product specification

 

 

Universal LCD driver for low multiplex

PCF8576C

rates

handbook, full pagewidth

S33

 

S32

 

S31

 

S30

 

S29

 

S28

 

S27

 

S26

 

S25

 

S24

 

S23

 

S22

 

S21

 

S20

 

S19

 

S18

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

64

 

63

 

62

 

61

 

60

 

59

 

58

 

57

 

56

 

55

 

54

 

53

 

52

 

51

 

50

 

49

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

n.c. 1 S34 2 S35 3 S36 4 S37 5 S38 6 S39 7

n.c. 8

PCF8576CH

n.c. 9 SDA 10 SCL 11 SYNC 12 CLK 13 VDD 14 OSC 15 A0 16

17

 

18

 

19

 

20

 

21

 

22

 

23

 

24

 

25

 

26

 

27

 

28

 

29

 

30

 

31

 

32

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A1

 

A2

 

SA0

 

V

 

LCD

 

n.c.

 

n.c.

 

n.c.

 

BP0

 

BP2

 

BP1

 

BP3

 

S0

 

S1

 

S2

 

S3

 

 

 

 

 

 

SS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

48 n.c.

47 S17

46 S16

45 S15

44 S14

43 S13

42 S12

41 S11

40 S10

39 S9

38 S8

37 S7

36 S6

35 S5

34 S4

33 n.c.

MLD333

Fig.3 Pin configuration; LQFP64.

1998 Jul 30

7

Philips Semiconductors

Product specification

 

 

Universal LCD driver for low multiplex

PCF8576C

rates

6 FUNCTIONAL DESCRIPTION

The PCF8576C is a versatile peripheral device designed to interface to any microprocessor/microcontroller to a wide variety of LCDs. It can directly drive any static or multiplexed LCD containing up to four backplanes and up to 40 segments. The display configurations possible with the PCF8576C depend on the number of active backplane outputs required; a selection of display configurations is given in Table 1.

All of the display configurations given in Table 1 can be implemented in the typical system shown in Fig.4.

The host microprocessor/microcontroller maintains the 2-line I2C-bus communication channel with the PCF8576C. The internal oscillator is selected by tying OSC (pin 6) to VSS (pin 11). The appropriate biasing voltages for the multiplexed LCD waveforms are generated internally. The only other connections required to complete the system are to the power supplies (VDD,

VSS and VLCD) and the LCD panel chosen for the application.

Table 1 Selection of display configurations

NUMBER OF

7-SEGMENTS NUMERIC

 

14-SEGMENTS

 

ALPHANUMERIC

 

 

 

 

 

DOT MATRIX

 

 

 

 

 

 

 

BACKPLANES

SEGMENTS

DIGITS

INDICATOR

CHARACTERS

INDICATOR

 

SYMBOLS

SYMBOLS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

160

20

20

10

 

20

160 dots (4 × 40)

 

 

 

 

 

 

 

 

3

120

15

15

8

 

8

120 dots (3 × 40)

 

 

 

 

 

 

 

 

2

80

10

10

5

 

10

80 dots (2 × 40)

 

 

 

 

 

 

 

 

1

40

5

5

2

 

12

40 dots (1 × 40)

 

 

 

 

 

 

 

 

VDD

R

 

tr

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2CB

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

V

 

 

V

LCD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SDA

 

 

5

 

12

 

 

 

 

 

 

HOST

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

 

 

 

 

 

17 to 56

40 segment drives

LCD PANEL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MICRO-

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SCL

 

 

 

PCF8576CT

 

 

 

 

PROCESSOR/

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2

 

 

 

 

 

(up to 160

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MICRO-

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OSC

 

 

 

 

 

 

 

 

 

 

 

 

 

elements)

CONTROLLER

 

 

 

 

 

 

 

 

 

 

 

 

 

6

 

 

 

 

 

 

13 to 16

4 backplanes

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

7

8

9

10

11

 

 

VSS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A0

A1

 

A2

 

 

SA0

VSS

MBE524

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Fig.4 Typical system configuration.

1998 Jul 30

8

Philips Semiconductors

Product specification

 

 

Universal LCD driver for low multiplex

PCF8576C

rates

6.1Power-on reset

At power-on the PCF8576C resets to a starting condition as follows:

1.All backplane outputs are set to VDD.

2.All segment outputs are set to VDD.

3.The drive mode ‘1 : 4 multiplex with 1¤3bias’ is selected.

4.Blinking is switched off.

5.Input and output bank selectors are reset (as defined in Table 5).

6.The I2C-bus interface is initialized.

7.The data pointer and the subaddress counter are cleared.

Data transfers on the I2C-bus should be avoided for 1 ms following power-on to allow completion of the reset action.

6.2LCD bias generator

The full-scale LCD voltage (Vop) is obtained from

VDD - VLCD. The LCD voltage may be temperature compensated externally through the VLCD supply to pin 12.

Fractional LCD biasing voltages are obtained from an internal voltage divider of the three series resistors connected between VDD and VLCD. The centre resistor can be switched out of the circuit to provide a 1¤2bias voltage level for the 1 : 2 multiplex configuration.

6.3LCD voltage selector

The LCD voltage selector co-ordinates the multiplexing of the LCD in accordance with the selected LCD drive configuration. The operation of the voltage selector is controlled by MODE SET commands from the command decoder. The biasing configurations that apply to the preferred modes of operation, together with the biasing

characteristics as functions of Vop = VDD - VLCD and the resulting discrimination ratios (D), are given in Table 2.

A practical value for Vop is determined by equating Voff(rms) with a defined LCD threshold voltage (Vth), typically when

the LCD exhibits approximately 10% contrast. In the static drive mode a suitable choice is Vop > 3Vth approximately.

Multiplex drive ratios of 1 : 3 and 1 : 4 with 1¤2bias are possible but the discrimination and hence the contrast

ratios are smaller ( 3 = 1.732 for 1 : 3 multiplex or

21

---------- = 1.528 for 1 : 4 multiplex). 3

The advantage of these modes is a reduction of the LCD full-scale voltage Vop as follows:

·

1 : 3 multiplex (1¤2bias):

 

 

Vop =

6 ´ Voff á rmsñ = 2.449 Voff(rms)

·

1 : 4 multiplex (1¤2bias):

 

 

V

=

(4 ´ 3)

= 2.309 V

off(rms)

 

op

 

-----------------------

 

 

 

 

3

 

 

These compare with Vop = 3 Voff(rms) when 1¤3bias is used.

Table 2 Preferred LCD drive modes: summary of characteristics

 

NUMBER OF

LCD BIAS

Voff(rms)

Von(rms)

Von(rms)

LCD DRIVE MODE

 

 

 

--------------------

--------------------

D = --------------------

 

BACKPLANES

LEVELS

CONFIGURATION

Vop

Vop

Voff(rms)

static

1

2

static

0

1

¥

 

 

 

 

 

 

 

1 : 2

2

3

1¤2

0.354

0.791

2.236

1 : 2

2

4

1¤3

0.333

0.745

2.236

1 : 3

3

4

1¤3

0.333

0.638

1.915

1 : 4

4

4

1¤3

0.333

0.577

1.732

1998 Jul 30

9

Philips Semiconductors

Product specification

 

 

Universal LCD driver for low multiplex

PCF8576C

rates

6.4LCD drive mode waveforms

6.4.1STATIC DRIVE MODE

The static LCD drive mode is used when a single backplane is provided in the LCD. Backplane and segment drive waveforms for this mode are shown in Fig.5.

V DD

BP0

VLCD

V DD

Sn

VLCD

VDD

S n 1

VLCD

Tframe

LCD segments

state 1

state 2

(on)

(off)

(a) waveforms at driver

V op

state 1

0

Vop

V op

state 2

0

Vop

(b) resultant waveforms

 

at LCD segment

MBE539

Vstate1(t) = VSn(t) VBP0(t)

Von(rms) = Vop

Vstate2(t) = VSn + 1(t) VBP0(t)

Voff(rms) = 0 V

Fig.5 Static drive mode waveforms (Vop = VDD VLCD).

1998 Jul 30

10

Philips Semiconductors

Product specification

 

 

Universal LCD driver for low multiplex

PCF8576C

rates

6.4.21 : 2 MULTIPLEX DRIVE MODE

When two backplanes are provided in the LCD, the 1 : 2 multiplex mode applies. The PCF8576C allows use of 1¤2bias or 1¤3bias in this mode as shown in Figs 6 and 7.

VDD

BP0 (VDD VLCD )/2

VLCD

VDD

BP1 (VDD VLCD )/2

VLCD

VDD

Sn

VLCD

VDD

S n 1

VLCD

Vop

Vop /2

state 1

0

Vop /2

Vop

Vop

Vop /2

state 2

0

Vop /2

Vop

Vstate1(t) = VSn(t) VBP0(t)

Von(rms) = 0.791Vop

Vstate2(t) = VSn(t) VBP1(t)

Voff(rms) = 0.354Vop

Tframe

LCD segments

state 1 state 2

(a) waveforms at driver

(b) resultant waveforms

MBE540

at LCD segment

Fig.6 Waveforms for the 1 : 2 multiplex drive mode with 1¤2bias (Vop = VDD - VLCD).

1998 Jul 30

11

Philips Semiconductors

Product specification

 

 

Universal LCD driver for low multiplex

PCF8576C

rates

BP0

BP1

Sn

S n 1

state 1

state 2

VDD

 

 

 

 

 

 

 

 

 

Tframe

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LCD segments

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

Vop /3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

2Vop /3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VLCD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

state 1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

state 2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

 

Vop /3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

2Vop /3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VLCD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

Vop /3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

2Vop /3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VLCD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

Vop /3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

2Vop /3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VLCD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(a) waveforms at driver

 

 

 

 

 

 

 

 

 

Vop

2Vop /3

Vop /3

0

Vop /3

2Vop /3

Vop

Vop

2Vop /3

Vop /3

0

Vop /3

2Vop /3

Vop

(b) resultant waveforms

MBE541

at LCD segment

 

Vstate1(t) = VSn(t) VBP0(t)

Von(rms) = 0.745Vop

Vstate2(t) = VSn(t) VBP1(t)

Voff(rms) = 0.333Vop

Fig.7 Waveforms for the 1 : 2 multiplex drive mode with 1¤3bias (Vop = VDD - VLCD).

1998 Jul 30

12

Philips Semiconductors

Product specification

 

 

Universal LCD driver for low multiplex

PCF8576C

rates

6.4.31 : 3 MULTIPLEX DRIVE MODE

When three backplanes are provided in the LCD, the 1 : 3 multiplex drive mode applies, as shown in Fig.8.

 

 

 

Tframe

 

 

VDD

LCD segments

BP0

VDD

Vop /3

VDD

2Vop /3

 

 

 

 

VLCD

state 1

 

 

VDD

 

 

state 2

BP1

VDD

Vop /3

VDD

2Vop /3

 

 

 

 

VLCD

 

 

 

VDD

 

BP2/S23

VDD

Vop /3

VDD

2Vop /3

 

 

 

 

VLCD

 

 

 

VDD

 

S n

VDD

Vop /3

VDD

2Vop /3

 

 

 

 

VLCD

 

 

 

VDD

 

Sn

1

VDD

Vop /3

VDD

2Vop /3

 

 

 

 

VLCD

 

 

 

VDD

 

Sn

2

VDD

Vop /3

VDD

2Vop /3

 

 

 

 

VLCD

 

 

 

 

(a) waveforms at driver

 

 

Vop

 

 

 

 

 

 

 

 

 

2V op /3

 

 

 

 

 

 

Vop /3

 

 

 

 

 

state 1

0

 

 

 

 

 

 

Vop /3

 

 

 

 

 

 

 

 

 

 

 

2V op /3

 

 

 

 

 

 

 

 

 

Vop

 

 

 

 

 

 

Vop

 

 

 

 

 

 

2V op /3

 

 

 

 

 

 

Vop /3

 

 

 

 

state 2

0

 

 

 

 

 

 

Vop /3

 

 

 

 

 

 

 

 

 

 

2V op /3

 

 

 

 

 

 

 

Vop

 

(b) resultant waveforms

MBE542

 

 

 

at LCD segment

Vstate1(t) = VSn(t) VBP0(t)

Von(rms) = 0.638Vop

Vstate2(t) = VSn(t) VBP1(t)

Voff(rms) = 0.333Vop

Fig.8 Waveforms for the 1 : 3 multiplex drive mode (Vop = VDD VLCD).

1998 Jul 30

13

Philips Semiconductors

Product specification

 

 

Universal LCD driver for low multiplex

PCF8576C

rates

6.4.41 : 4 MULTIPLEX DRIVE MODE

When four backplanes are provided in the LCD, the 1 : 4 multiplex drive mode applies, as shown in Fig.9.

BP0

BP1

BP2

BP3

Sn

Sn 1

S n 2

Sn 3

state 1

state 2

VDD

 

 

 

 

 

 

 

 

 

 

 

 

 

Tframe

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

Vop /3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

2Vop /3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VLCD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

Vop /3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

2Vop /3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VLCD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

Vop /3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

2Vop /3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VLCD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

Vop /3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

2Vop /3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VLCD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

Vop /3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

2Vop /3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VLCD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

Vop /3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

2Vop /3

 

 

 

 

 

 

 

 

 

 

 

VLCD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

Vop /3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

2Vop /3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VLCD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

Vop /3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

 

2Vop /3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VLCD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(a) waveforms at driver

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Vop

 

2Vop /3

 

Vop /3

 

0

 

Vop /3

 

2Vop /3

 

Vop

 

Vop

 

2Vop /3

 

Vop /3

 

0

 

Vop /3

 

2Vop /3

 

Vop

(b) resultant waveforms

 

at LCD segment

LCD segments

state 1

 

state 2

 

Vstate1(t)

= VSn(t) VBP0(t)

Von(rms)

= 0.577Vop

Vstate2(t) = VSn(t) VBP1(t)

Voff(rms) = 0.333Vop

MBE543

Fig.9 Waveforms for the 1 : 4 multiplex drive mode (Vop = VDD VLCD).

1998 Jul 30

14

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