Philips PCA8582F-2P, PCA8582F-2T, PCD8582D-2P, PCD8582D-2T, PCF8582E-2P Datasheet

INTEGRATED CIRCUITS

DATA SHEET

PCX8582X-2 Family

256 x 8-bit CMOS EEPROMS with I2C-bus interface

Product specification

December 1994

Supersedes data of February 1992

File under Integrated Circuits, IC12

Philips Semiconductors

Philips Semiconductors	Product specification

256 x 8-bit CMOS EEPROMS

PCX8582X-2 Family

with I2C-bus interface

FEATURES

∙Low power CMOS

–maximum active current 2.0 mA

–maximum standby current 10 μA (at 6.0 V), typical 4 μA

∙Non-volatile storage of 2-Kbits organized as 256 × 8-bits

∙Single supply with full operation down to 2.5 V

∙On-chip voltage multiplier

∙Serial input/output I2C-bus

∙Write operations

–byte write mode

–8-byte page write mode

(minimizes total write time per byte)

∙Read operations

–sequential read

–random read

∙Internal timer for writing (no external components)

∙Power-on reset

∙High reliability by using a redundant storage code

∙Endurance

–>500 k E/W-cycles at Tamb = 22 °C

∙40 years non-volatile data retention time (typ.)

∙Pin and address compatible to

–PCX8570, PCF8571, PCF8572 and PCF8581

–PCX8494X-2, PCX8598X-2 -Family.

QUICK REFERENCE DATA

DESCRIPTION

The PCX8582X-2 is a 2-Kbit (256 × 8-bit) floating gate electrically erasable programmable read only memory (EEPROM). By using an internal redundant storage code it is fault tolerant to single bit errors. This feature dramatically increases reliability compared to conventional EEPROM memories.

Power consumption is low due to the full CMOS technology used. The programming voltage is generated on-chip, using a voltage multiplier.

As data bytes are received and transmitted via the serial I2C-bus, a package using eight pins is sufficient. Up to eight PCX8582X-2 devices may be connected to the I2C-bus. Chip select is accomplished by three address inputs (A0, A1, A2).

Timing of the ERASE/WRITE cycle is carried out internally, thus no external components are required. Pin 7 (PTC) must be connected to either VDD or left open-circuit.

There is an option of using an external clock for timing the length of an ERASE/WRITE cycle.

SYMBOL	PARAMETER	CONDITIONS	MIN.	MAX.	UNIT
VDD	supply voltage		2.5	6.0	V
IDDR	supply current READ	fSCL = 100 kHz
		VDD = 3 V	−	60	μA
		VDD = 6 V	−	200	μA
IDDW	supply current ERASE/WRITE	fSCL = 100 kHz
		VDD = 3 V	−	0.6	mA
		VDD = 6 V	−	2.0	mA
IDDSB	supply current STANDBY	VDD = 3 V	−	3.5	μA
		VDD = 6 V	−	10	μA

December 1994

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Philips Semiconductors	Product specification

256 x 8-bit CMOS EEPROMS

PCX8582X-2 Family

with I2C-bus interface

ORDERING INFORMATION

TYPE

PACKAGE

TEMPERATURE (°C)

SUPPLY (V)

NUMBER

NAME

DESCRIPTION

VERSION

MIN.

MAX.

MIN.

MAX.

PCF8582C-2P

DIP8

plastic dual in-line package;

SOT97-1

−40

+85

2.5

6.0

8 leads (300 mil)

PCD8582D-2P

−25

+70

3.0

6.0

PCF8582E-2P

−40

+85

4.5

5.5

PCA8582F-2P

−40

+125

4.5

5.5

PCF8582C-2T

SO8

plastic small outline

SOT96-1

−40

+85

2.5

6.0

package;

PCD8582D-2T

−25

+70

3.0

6.0

8 leads; body width 3.9 mm

PCF8582E-2T

−40

+85

4.5

5.5

PCA8582F-2T

−40

+125

4.5

5.5

DEVICE SELECTION

Table 1 Device selection code

SELECTION

DEVICE CODE

CHIP ENABLE

R/W

Bit

b71

b6

b5

b4

b3

b2

b1

b0

Device

1

0

1

0

A2

A1

A0

R/W

Note

1. The MSB b7 is sent first.

Table 2 Endurance and data retention guarantees

DEVICE	ENDURANCE E/W CYCLES	DATA RETENTION YEARS
PCF8582C-2; PCA8582F-2	500000(1)	40

Note

1.At the time of publication of this data sheet the statistical history was not yet sufficient to guarantee 1000000000 E/W cycle performance for these types.

December 1994

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Philips Semiconductors	Product specification

256 x 8-bit CMOS EEPROMS

PCX8582X-2 Family

with I2C-bus interface

BLOCK DIAGRAM

					PTC
			DIVIDER ( 128)		7			MBC794
			SEQUENCER		TIMER	( 16)	OSCILLATOR
		LOGIC			EE CONTROL
					4
		BUS CONTROL	ADDRESS HIGH REGISTER		EEPROM		PCX8582X-2
		I			8
		-C
		2
					ADDRESS POINTER			handbook,fullpagewidth
						MODETESTDECODER	ON-POWERRESET
	INPUT FILTER		BYTE COUNTER	3	SHIFT REGISTER
					BYTE LATCH bytes)(8
V					ADDRESS SWITCH			SS
	8		n				4	V
DD
	6	5			3 2 1
	SCL	SDA			A2	A1	A0
December 1994					4

Fig.1 Block diagram.

Philips Semiconductors	Product specification

256 x 8-bit CMOS EEPROMS

PCX8582X-2 Family

with I2C-bus interface

PINNING

SYMBOL

PIN

DESCRIPTION

A0

1

address input 0

handbook, halfpage

V DD

A0

1

8

A1

2

address input 1

PTC

A1

2

7

A2

3

address input 2

PCX8582X-2

A2

SCL

3

6

VSS

4

negative supply voltage

VSS

SDA

5

serial data input/output (I2C-bus)

4

5

SDA

SCL

6

serial clock input (I2C-bus)

MBC792

PTC

7

programming time control output

Fig.2 Pin configuration.

VDD

8

positive supply voltage

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC134).

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

VDD

supply voltage

−0.3

+7.0

V

VI

voltage on any input pin

|ZI| > 500 Ω

VSS − 0.8

VDD + 0.8

V

II

current on any input pin

−

1

mA

IO

output current

−

10

mA

Tstg

storage temperature

−65

+150

°C

Tamb

operating ambient temperature

PCF8582C-2; PCF8582E-2

−40

+85

°C

PCD8582D-2

−25

+70

°C

PCA8582F-2

−40

+125

°C

December 1994

5

Philips Semiconductors	Product specification

256 x 8-bit CMOS EEPROMS

PCX8582X-2 Family

with I2C-bus interface

CHARACTERISTICS

PCF8582C-2: VDD = 2.5 to 6.0 V; VSS = 0 V; Tamb = −40 to +85 °C; unless otherwise specified. PCD8582D-2: VDD = 3.0 to 6.0 V; VSS = 0 V; Tamb = −25 to +70 °C; unless otherwise specified.

PCF8582E-2: VDD = 4.5 to 5.5 V; VSS = 0 V; Tamb = −40 to +85 °C; unless otherwise specified. PCA8582F-2: VDD = 4.5 to 5.5 V; VSS = 0 V; Tamb = −40 to +125 °C; unless otherwise specified.

SYMBOL	PARAMETER	CONDITIONS	MIN.	MAX.	UNIT
Supplies
VDD	supply voltage
	PCF8582C-2		2.5	6.0	V
	PCD8582D-2		3.0	6.0	V
	PCF8582E-2; PCA8582F-2		4.5	5.5	V
IDDR	supply current READ	fSCL = 100 kHz
	PCF8582C-2; PCD8582D-2	VDD = 3.0 V	−	60	μA
		VDD = 6.0 V	−	200	μA
	PCF8582E-2; PCA8582F-2	VDD = 5.5 V	−	200	μA
IDDW	supply current ERASE/WRITE	fSCL = 100 kHz
	PCF8582C-2; PCD8582D-2	VDD = 3.0 V	−	0.6	mA
		VDD = 6.0 V	−	2.0	mA
	PCF8582E-2; PCA8582F-2	VDD = 5.5 V	−	2.0	mA
IDDSB	supply current STANDBY	fSCL = 100 kHz
	PCF8582C-2; PCD8582D-2	VDD = 3.0 V	−	3.5	μA
		VDD = 6.0 V	−	10	μA
	PCF8582E-2; PCA8582F-2	VDD = 5.5 V	−	10	μA
PTC input (pin 7)
VIL	LOW level input voltage		−0.8	0.1VDD	V
VIH	HIGH level input voltage		0.9VDD	VDD + 0.8	V
SCL input (pin 6)
VIL	LOW level input voltage		−0.8	0.3VDD	V
VIH	HIGH level input voltage		0.7VDD	VDD + 0.8	V
ILI	input leakage current	VI = VDD or VSS	−	±1	μA
fSCL	clock input frequency		0	100	kHz
CI	input capacitance	VI = VSS	−	7	pF
SDA input/output (pin 5)
VIL	LOW level input voltage		−0.8	0.3VDD	V
VIH	HIGH level input voltage		0.7VDD	VDD + 0.8	V
VOL	LOW level output voltage	IOL = 3 mA; VDD(min)	−	0.4	V
ILO	output leakage current	VOH = VDD	−	1	μA
CI	input capacitance	VI = VSS	−	7	pF
Data retention time
tS	data retention time	Tamb = 55 °C	10	−	years

December 1994

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