INTEGRATED CIRCUITS
DATA SHEET
TDA8360; TDA8361; TDA8362
Integrated PAL and PAL/NTSC TV processors
Objective specification |
March 1994 |
File under Integrated Circuits, IC02 |
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Philips Semiconductors
Philips Semiconductors |
Objective specification |
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Integrated PAL and PAL/NTSC TV
TDA8360; TDA8361; TDA8362
processors
FEATURES
Available in TDA8360, TDA8361
and TDA8362
∙Vision IF amplifier with high sensitivity and good differential gain and phase
∙Multistandard FM sound demodulator (4.5 MHz to 6.5 MHz)
∙Integrated chrominance trap and bandpass filters (automatically calibrated)
∙Integrated luminance delay line
∙RGB control circuit with linear RGB inputs and fast blanking
∙Horizontal synchronization with two control loops and alignment-free horizontal oscillator without external components
∙Vertical count-down circuit
(50/60 Hz) and vertical preamplifier
∙Low dissipation (700 mW)
∙Small amount of peripheral components compared with competition ICs
∙Only one adjustment (vision IF demodulator)
∙The supply voltage for the ICs is 8 V. They are mounted in a shrink DIL envelope with 52 pins and are pin compatible.
Additional features
TDA8360
∙Alignment-free PAL colour decoder for all PAL standards, including PAL-N and PAL-M.
TDA8361
∙PAL/NTSC colour decoder with automatic search system
∙Source selection for external audio/video (A/V) inputs (separate Y/C signals can also be applied).
TDA8362
∙Multistandard vision IF circuit (positive and negative modulation)
∙PAL/NTSC colour decoder with automatic search system
∙Source selection for external A/V inputs (separate Y/C signals can also be applied)
∙Easy interfacing with the TDA8395 (SECAM decoder) for multistandard applications.
GENERAL DESCRIPTION
The TDA8360, TDA8361 and TDA8362 are single-chip TV processors which contain nearly all small signal functions that are required for a colour television receiver. For a complete receiver the following circuits need to be added: a base-band delay line (TDA4661), a tuner and output stages for audio, video and horizontal and vertical deflection.
Because of the different functional contents of the ICs the set maker can make the optimum choice depending on the requirements for the receiver.
The TDA8360 is intended for simple PAL receivers (all PAL standards, including PAL-N and PAL-M are possible).
The TDA8361 contains a PAL/NTSC decoder and has an A/V switch.
For real multistandard applications the TDA8362 is available. In addition to the extra functions which are available in the TDA8361, the TDA8362 can handle signals with positive modulation and it supplies the signals which are required for the SECAM decoder TDA8395.
ORDERING INFORMATION
EXTENDED TYPE |
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PIN POSITION |
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CODE |
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TDA8360 |
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shrink DIL |
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plastic |
SOT247AG |
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TDA8361 |
52 |
shrink DIL |
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plastic |
SOT247AG |
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TDA8362 |
52 |
shrink DIL |
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plastic |
SOT247AG |
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March 1994 |
2 |
Philips Semiconductors |
Objective specification |
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Integrated PAL and PAL/NTSC TV
TDA8360; TDA8361; TDA8362
processors
QUICK REFERENCE DATA
SYMBOL |
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PARAMETER |
CONDITIONS |
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TYP. |
MAX. |
UNIT |
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VP |
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supply voltage |
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7.2 |
8.0 |
8.8 |
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supply current |
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80 |
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Input voltages |
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V45,46(rms) |
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video IF amplifier sensitivity (RMS value) |
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V5(rms) |
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sound IF amplifier sensitivity (RMS value) |
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V6(rms) |
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external audio input (RMS value) |
TDA8361, TDA8362 |
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350 |
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V15(p-p) |
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external CVBS input (peak-to-peak value) |
TDA8361, TDA8362 |
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1 |
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V22,23,24(p−p) |
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RGB inputs (peak-to-peak value) |
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0.7 |
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Output signals |
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VO(p-p) |
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demodulated CVBS output |
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2.4 |
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I47 |
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tuner AGC control current |
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V44 |
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AFC output voltage swing |
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V50(rms) |
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audio output voltage (RMS value) |
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700 |
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V18,19,20(p-p) |
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RGB output signal amplitudes |
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I37 |
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horizontal output current |
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I43 |
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vertical output current |
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mA |
Control voltages |
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Vcontrol |
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control voltages for Volume, Contrast, |
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V |
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Saturation, Brightness, Hue and Peaking |
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March 1994 |
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March1994 |
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flyback |
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sandcastle |
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processors |
IntegratedPAL |
SemiconductorsPhilips |
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VRAMP |
PH1LF |
PH2LF |
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FBI/SCO |
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DEC AGC |
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XTAL1 |
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XTAL2 |
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TUNE ADJ |
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VOUT |
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AGCOUT |
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VFB |
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VSTART |
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HOUT |
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IFIN1 |
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IF |
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VERTICAL |
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XTAL |
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PAL/NTSC |
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AGC |
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PHASE 1 |
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AMPLIFIER |
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OUTPUT |
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OSCILLATOR |
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IFIN2 |
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IFDEM1 |
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AFC AND |
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LINE |
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COLOUR |
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PHASE |
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DEMODULATOR |
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SAMPLE- |
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TUNING |
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DIVIDER |
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OSCILLATOR |
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KILLERS |
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DETECTOR |
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AND-HOLD |
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IFDEM2 |
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DET |
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AFCOUT |
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30 |
R-Y output |
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IFOUT |
VIDEO |
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VIDEO |
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H AND V |
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COINCIDENCE |
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ACC |
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PAL |
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DEMODULATOR |
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AMPLIFIER |
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IDENTIFICATION |
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SEPARATION |
DETECTOR |
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AMPLIFIER |
IDENTIFICATION |
TDA4661 |
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B-Y output |
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IDENT |
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SAT |
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DECDIG |
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B-Y input |
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NOISE |
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POWER |
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CHROMINANCE |
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CLAMPS |
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TEST |
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SUPPLY |
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MATRIX |
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DETECTOR |
RESET |
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BANDPASS |
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SET |
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TDA4661 |
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AUDEEM |
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R-Y input |
TDA8360; |
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RIN |
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AUOUT |
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PREAMPLIFIER |
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TRAP AND |
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LUMINANCE |
CLAMP |
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VOLUME |
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TUNING |
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GIN |
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MUTE |
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BYPASS |
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PEAKING |
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MATRIX |
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SWITCH |
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BIN |
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DEC DEM |
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RGBIN |
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BOUT |
TDA8362 TDA8361; |
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TDA8360 |
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OUTPUT |
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LIMITER |
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PLL |
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PWL |
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GOUT |
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STAGES |
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ROUT |
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SOIF |
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25 |
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volume |
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CVBS INT |
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PEAKIN |
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CON |
BRI |
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specification Objective |
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GND2 |
GND1 |
VP |
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control |
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DEC FT |
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DEC BG |
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Fig.1 |
Block diagram for TDA8360. |
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1994 March |
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flayback |
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sandcastle |
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processors |
PALIntegrated |
SemiconductorsPhilips |
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VRAMP |
PH1LF |
PH2LF |
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FBI/SCO |
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DEC AGC |
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XTAL1 |
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XTAL2 |
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TUNE ADJ |
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VOUT |
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AGCOUT |
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VFB |
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VSTART |
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HOUT |
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IFIN1 |
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47 |
49 |
48 |
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IF |
AGC |
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VERTICAL |
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PHASE 1 |
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PHASE 2 |
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XTAL |
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HUE |
27 |
HUE |
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PAL/NTSC |
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46 |
AMPLIFIER |
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OUTPUT |
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OSCILLATOR |
CONTROL |
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IFIN2 |
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IFDEM1 |
2 |
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AFC AND |
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COLOUR |
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PHASE |
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DEMODULATOR |
SAMPLE- |
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TUNING |
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DIVIDER |
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OSCILLATOR |
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KILLERS |
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DETECTOR |
33 |
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3 |
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AND-HOLD |
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IFDEM2 |
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DET |
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AFCOUT |
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30 |
R-Y output |
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7 |
VIDEO |
VIDEO |
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H AND V |
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COINCIDENCE |
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ACC |
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SYSTEM |
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to |
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IFOUT |
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DEMODULATOR |
31 |
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AMPLIFIER |
IDENTIFICATION |
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SEPARATION |
DETECTOR |
AMPLIFIER |
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MANAGER |
TDA4661 |
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4 |
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B-Y output |
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5 |
IDENT |
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DECDIG |
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28 |
B-Y input |
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NOISE |
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POWER |
CHROMINANCE |
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CLAMPS |
from |
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TEST |
SUPPLY |
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MATRIX |
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29 |
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DETECTOR |
RESET |
BANDPASS |
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SET |
TDA4661 |
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AUDEEM |
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1 |
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R-Y input |
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TDA8360; |
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EXTAU |
6 |
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18 |
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22 |
RIN |
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50 |
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PREAMPLIFIER |
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TRAP AND |
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Y DELAY |
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LUMINANCE |
CLAMP |
23 |
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AUOUT |
VOLUME |
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TUNING |
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GIN |
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MUTE |
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BYPASS |
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PEAKING |
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MATRIX |
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SWITCH |
24 |
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BIN |
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DEC DEM |
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21 |
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RGBIN |
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TDA8361 |
LUMINANCE |
CHROMINANCE |
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OUTPUT |
19 |
BOUT |
TDA8362TDA8361; |
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LIMITER |
PLL |
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PWL |
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GOUT |
specificationObjective |
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5 |
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SWITCH |
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SWITCH |
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STAGES |
20 |
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ROUT |
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SOIF |
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11 |
9 |
10 |
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52 |
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12 |
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13 |
15 |
14 |
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16 |
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25 |
17 |
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MLA622 - 1 |
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volume |
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CVBS INT |
CVBSEXT |
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CHROMA |
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CON |
BRI |
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control |
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GND2 |
GND1 |
VP |
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PEAKIN |
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DEC FT |
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DEC BG |
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Fig.2 |
Block diagram for TDA8361. |
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1994 March
flyback sandcastle
VRAMP PH1LF |
FBI/SCO |
PH2LF |
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AUOUT |
DEC AGC |
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XTAL1 |
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XTAL2 |
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VOUT |
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IDENT |
AGCOUT |
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AFCOUT |
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VFB |
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VSTART |
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HOUT |
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XTALOUT |
HUE |
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4 |
50 |
47 |
48 |
44 |
43 |
41 |
42 |
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40 |
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36 |
39 |
38 |
37 |
34 |
35 |
32 |
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27 |
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IFIN1 |
45 |
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IF |
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VERTICAL |
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XTAL |
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HUE |
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AGC |
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PHASE 1 |
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PHASE 2 |
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46 |
AMPLIFIER |
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OUTPUT |
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OSCILLATOR |
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CONTROL |
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IFIN2 |
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TUNE ADJ |
49 |
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IFDEM1 |
2 |
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AFC AND |
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VERTICAL |
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LINE |
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SYSTEM |
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PHASE |
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|||
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DEMODULATOR |
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SAMPLE- |
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TUNING |
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33 |
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|||||||||
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DIVIDER |
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OSCILLATOR |
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MANAGER |
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DETECTOR |
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3 |
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AND-HOLD |
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IFDEM2 |
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DET |
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IFOUT |
7 |
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30 |
R-Y output |
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VIDEO |
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VIDEO |
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POWER |
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H AND V |
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COINCIDENCE |
COLOUR |
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to |
||||||
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DEMODULATOR |
31 |
||||||||||||||
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IDENTIFICATION |
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AMPLIFIER |
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RESET |
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SEPARATION |
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DETECTOR |
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KILLERS |
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TDA4661 |
|||||||||
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B-Y output |
6 |
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1 |
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AUDEEM |
6 |
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28 |
B-Y input |
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EXTAU |
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|||
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SWITCH |
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PREAMPLIFIER |
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TDA8362 |
|
NOISE |
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ACC |
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CLAMPS |
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from |
|||||
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MATRIX |
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29 |
||||||||||||
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VOLUME |
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MUTE |
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DETECTOR |
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AMPLIFIER |
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SET |
TDA4661 |
|||||||
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R-Y input |
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DEC DEM |
51 |
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22 |
RIN |
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TRAP AND |
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CHROMINANCE |
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CHROMINANCE |
LUMINANCE |
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CLAMP |
23 |
|||||||
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5 |
LIMITER |
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PLL |
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GIN |
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BYPASS |
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SWITCH |
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BANDPASS |
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MATRIX |
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SWITCH |
24 |
|||||||||
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SOIF |
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BIN |
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volume |
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control |
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18 |
BOUT |
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8 |
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LUMINANCE |
|
Y DELAY |
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OUTPUT |
19 |
||||
|
|
SUPPLY |
|
TEST |
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TUNING |
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PWL |
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GOUT |
||||||||||
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SWITCH |
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PEAKING |
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STAGES |
20 |
|||||||||
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DECDIG |
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ROUT |
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11 |
9 |
10 |
52 |
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12 |
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15 |
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14 |
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26 |
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25 |
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MBC214 - 1 |
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CVBS INT CVBSEXT |
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PEAKIN |
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CON |
BRI |
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GND2 |
GND1 |
VP |
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CHROMA |
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SAT RGBIN |
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DEC FT |
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DEC BG |
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Fig.3 Block diagram for TDA8362.
TV PAL/NTSC and PAL Integrated processors
TDA8362 TDA8361; TDA8360;
Semiconductors Philips
specification Objective
Philips Semiconductors |
Objective specification |
|
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Integrated PAL and PAL/NTSC TV
TDA8360; TDA8361; TDA8362
processors
PINNING (TDA8362)
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DEC BG |
AUDEEM |
1 |
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52 |
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DEC DEM |
IFDEM1 |
2 |
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51 |
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IFDEM2 |
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AUOUT |
3 |
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50 |
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TUNEADJ |
IDENT |
4 |
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49 |
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DECAGC |
SOIF |
5 |
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48 |
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EXTAU |
6 |
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47 |
AGCOUT |
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IFIN2 |
IFOUT |
7 |
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46 |
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DEC DIG |
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8 |
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45 |
IFIN1 |
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AFCOUT |
GND1 |
9 |
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44 |
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VP |
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10 |
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43 |
VOUT |
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GND2 |
11 |
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42 |
VRAMP |
DEC FT |
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12 |
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41 |
VFB |
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CVBS INT |
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13 |
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40 |
PH1LF |
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TDA8362 |
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PEAKIN |
14 |
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39 |
PH2LF |
CVBSEXT |
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FBI/SCO |
15 |
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38 |
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HOUT |
CHROMA |
16 |
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37 |
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BRI |
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VSTART |
17 |
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36 |
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BOUT |
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XTAL2 |
18 |
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35 |
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XTAL1 |
GOUT |
19 |
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34 |
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ROUT |
20 |
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33 |
DET |
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RGBIN |
21 |
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32 |
XTALOUT |
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RIN |
22 |
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31 |
BYO |
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GIN |
23 |
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30 |
RYO |
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BIN |
24 |
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29 |
RYI |
CON |
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25 |
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28 |
BYI |
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SAT |
26 |
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27 |
HUE |
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MBC203 |
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Fig.4 Pin configuration for TDA8362.
SYMBOL |
PIN |
DESCRIPTION |
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AUDEEM |
1 |
audio de-emphasis and ± modulation switch |
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IFDEM1 |
2 |
IF demodulator tuned circuit |
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IFDEM2 |
3 |
IF demodulator tuned circuit |
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IDENT |
4 |
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input |
video identification output/MUTE |
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SOIF |
5 |
sound IF input and volume control |
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EXTAU |
6 |
external audio input |
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IFOUT |
7 |
IF video output |
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DECDIG |
8 |
decoupling digital supply |
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GND1 |
9 |
ground 1 |
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VP |
10 |
supply voltage (+8 V) |
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GND2 |
11 |
ground 2 |
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DECFT |
12 |
decoupling filter tuning |
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CVBSINT |
13 |
internal CVBS input |
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PEAKIN |
14 |
peaking control input |
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CVBSEXT |
15 |
external CVBS input |
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CHROMA |
16 |
chrominance and A/V switch input |
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BRI |
17 |
brightness control input |
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BOUT |
18 |
blue output |
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GOUT |
19 |
green output |
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ROUT |
20 |
red output |
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RGBIN |
21 |
RGB insertion and blanking input |
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RIN |
22 |
red input |
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GIN |
23 |
green input |
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BIN |
24 |
blue input |
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CON |
25 |
contrast control input |
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SAT |
26 |
saturation control input |
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HUE |
27 |
hue control input (or chrominance output) |
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BYI |
28 |
B−Y input signal |
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RYI |
29 |
R−Y input signal |
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RYO |
30 |
R−Y output signal |
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BYO |
31 |
B−Y output signal |
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XTALOUT |
32 |
4.43 MHz output for TDA8395 |
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DET |
33 |
loop filter burst phase detector |
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XTAL1 |
34 |
3.58 MHz crystal connection |
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XTAL2 |
35 |
4.43 MHz crystal connection |
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VSTART |
36 |
supply/start horizontal oscillator |
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HOUT |
37 |
horizontal output |
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FBI/SCO |
38 |
flyback input/sandcastle output |
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PH2LF |
39 |
phase 2 loop filter |
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PH1LF |
40 |
phase 1 loop filter |
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March 1994 |
7 |
Philips Semiconductors |
Objective specification |
|
|
Integrated PAL and PAL/NTSC TV
TDA8360; TDA8361; TDA8362
processors
SYMBOL |
PIN |
DESCRIPTION |
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VFB |
41 |
vertical feedback input |
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VRAMP |
42 |
vertical ramp generator |
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VOUT |
43 |
vertical output |
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AFCOUT |
44 |
AFC output |
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IFIN1 |
45 |
IF input 1 |
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IFIN2 |
46 |
IF input 2 |
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AGCOUT |
47 |
tuner AGC output |
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DECAGC |
48 |
AGC decoupling capacitor |
TUNEADJ |
49 |
tuner take-over adjustment |
AUOUT |
50 |
audio output |
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DECDEM |
51 |
decoupling sound demodulator |
DECBG |
52 |
decoupling bandgap supply |
TDA8360
The TDA8360 has the following differences to the pinning:
Pin 6: external audio input not connected
Pin 15: external CVBS input not connected
Pin 16: chrominance and A/V switch input not connected
Pin 27: hue control input not connected.
TDA8361
The TDA8361 has the following differences to the pinning:
Pin 1: only audio de-emphasis
Pin 27: only hue control
Pin 32: 4.43 MHz output for TDA8395 is not connected.
FUNCTIONAL DESCRIPTION
Video IF amplifier
The IF amplifier contains
3 AC-coupled control stages with a total gain control range of greater than 60 dB. The sensitivity of the circuit is comparable with that of modern IF ICs.
The reference carrier for the video demodulator is obtained by means of passive regeneration of the picture carrier. The external reference tuned circuit is the only remaining adjustment of the IC.
In the TDA8362 the polarity of the demodulator can be switched so that the circuit is suitable for both positive and negative modulated signals.
The AFC circuit is driven with the same reference signal as the video demodulator. To ensure that the video content does not disturb the AFC operation a sample-and-hold circuit is incorporated; the capacitor for this function is internal. The AFC output voltage is 6 V.
The AGC detector operates on levels, top sync for negative modulated and top white for positive modulated signals.The AGC detector time constant capacitor is connected externally. This is mainly because of the flexibility of the application.
The time constant of the AGC system during positive modulation (TDA8362) is slow, this is to avoid any visible picture variations. This, however, causes the system to react very slowly to sudden changes in the input signal amplitude.
To overcome this problem a speed-up circuit has been included which detects whether the AGC detector is activated every frame period. If, during a 3-frame period, no action is detected the speed of the system is increased. When the incoming signal has no peak white information (e.g. test lines in the vertical retrace period) the gain would be video signal dependent. To avoid this effect the circuit also contains a black level AGC detector which is activated when the black level of the video signal exceeds a certain level.
The TDA8361 and TDA8362 contain a video identification circuit which is independent of the synchronization circuit. Therefore search tuning is possible when the display section of the receiver is used as a monitor. In the TDA8360 this circuit is only used for stable OSD at no signal input. In the normal television mode the identification output is connected to the coincidence detector, this applies to all three devices. The identification output voltage is LOW when no transmitter is identified. In this condition the sound demodulator is switched off (mute function). When a transmitter is identified the output voltage is HIGH. The voltage level is dependent on the frequency of the incoming chrominance signal.
March 1994 |
8 |
Philips Semiconductors |
Objective specification |
|
|
Integrated PAL and PAL/NTSC TV
TDA8360; TDA8361; TDA8362
processors
Sound circuit
The sound bandpass and trap filters have to be connected externally. The filtered intercarrier signal is fed to a limiter circuit and is demodulated by means of a PLL demodulator. The PLL circuit tunes itself automatically to the incoming signal, consequently, no adjustment is required.
The volume is DC controlled. The composite audio output signal has an amplitude of 700 mV RMS at a volume control setting of −6 dB. The de-emphasis capacitor has to be connected externally. The non-controlled audio signal can be obtained from this pin via a buffer stage. The amplitude of this signal is 350 mV RMS.
The TDA8361 and TDA8362 external audio input signal must have an amplitude of 350 mV RMS. The audio/video switch is controlled via the chrominance input pin.
Synchronization circuit
The sync separator is preceded by a voltage controlled amplifier which adjusts the sync pulse amplitude to a fixed level. The sync pulses are then fed to the slicing stage (separator) which operates at 50% of the amplitude.
The separated sync pulses are fed to the first phase detector and to the coincidence detector. The coincidence detector is used for transmitter identification and to detect whether the line oscillator is synchronized. When the circuit is not synchronized the voltage on the peaking control pin (pin 14) is LOW so that this condition can be detected externally. The first PLL has a very high static steepness, this ensures that the phase of the picture is independent of the line frequency. The line oscillator operates at twice the line frequency.
The oscillator network is internal. Because of the spread of internal components an automatic adjustment circuit has been added to the IC. The circuit compares the oscillator frequency with that of the crystal oscillator in the colour decoder. This results in a free-running frequency which deviates less than 2% from the typical value.
The circuit employs a second control loop to generate the drive pulses for the horizontal driver stage.
X-ray protection can be realised by switching the pin of the second control loop to the positive supply line. The detection circuit must be connected externally. When the X-ray protection is active the horizontal output voltage is switched to a high level. When the voltage on this pin returns to its normal level the horizontal output is released again.
The IC contains a start-up circuit for the horizontal oscillator. When this feature is required a current of 6.5 mA has to be supplied to pin 36. For an application without start-up both supply pins (10 and 36) must be connected to the 8 V supply line.
The drive signal for the vertical ramp generator is generated by means of a divider circuit. The RC network for the ramp generator is external.
Integrated video filters
The circuit contains a chrominance bandpass and trap circuit. The filters are realised by means of gyrator circuits and are automatically tuned by comparing the tuning frequency with the crystal frequency of the decoder.
In the TDA8361 and TDA8362 the chrominance trap is active only when the separate chrominance input pin is connected to ground or to the positive supply voltage and when a colour signal is recognized.
When the pin is left open-circuit the trap is switched off so that the circuit can also be used for S-VHS applications.
The luminance delay line and the delay for the peaking circuit are also realised by means of gyrator circuits.
Colour decoder
The colour decoder in the various ICs contains an alignment-free crystal oscillator, a colour killer circuit and colour difference demodulators.
The 90° phase shift for the reference signal is achieved internally. Because the main differences of the 3 ICs are found in the colour decoder the various types will be discussed.
TDA8360
This IC contains only a PAL decoder. Depending on the frequency of the crystals which are connected to the IC the decoder can demodulate all PAL standards. Because the horizontal oscillator is calibrated by using the crystal frequency as a reference the 4.4 MHz crystal must be connected to pin 35 and the 3.5 MHz crystal to pin 34. When only one crystal is connected to the IC the other crystal pin must be connected to the positive supply rail via a 47 kΩ resistor. For applications with two 3.5 MHz crystals both must be connected to pin 34 and the switching between the crystals must be made externally. Switching of the crystals is only allowed directly after the vertical retrace. The circuit will indicate whether a PAL signal has been identified by the colour decoder via the saturation control pin.
When two crystals are connected to the IC the output voltage of the video identification circuit indicates the frequency of the incoming chrominance signal.
March 1994 |
9 |
Philips Semiconductors |
Objective specification |
|
|
Integrated PAL and PAL/NTSC TV
TDA8360; TDA8361; TDA8362
processors
The conditions are:
∙Signal identified at
fosc = 3.6 MHz; VO = 6 V
∙Signal identified at
fosc = 4.4 MHz (or no colour); VO = 8 V.
This information can be used to switch the sound bandpass filter and trap filter.
TDA8361
This IC contains an automatic PAL/NTSC decoder. The conditions for connecting the reference crystals are the same as for the TDA8360. The decoder can be forced to PAL when the hue control pin is connected to the positive supply voltage via a
5 kΩ or 10 kΩ resistor (approximately). The decoder cannot be forced to the NTSC standard. It is also possible to see if a colour signal is recognized via the saturation pin.
TDA8362
In addition to the possibilities of the TDA8361, the TDA8362 can co-operate with the SECAM add-on decoder TDA8395.
The communication between the two ICs is achieved via pin 32. The TDA8362 supplies the reference signal (4.43 MHz) for the calibration system of the TDA8395, identification of the colour standard is via the same connection. When a SECAM signal is detected by the TDA8395 the IC will draw a current of 150 μA. When TDA8362 has not identified a colour signal in this condition it will go into the SECAM mode, that means it will switch off the R−Y and B−Y outputs and increase the voltage level on pin 32.
This voltage will switch off the colour-killer in the TDA8395 and switch on the R−Y and B−Y outputs of the TDA8395. Forcing the system to the SECAM standard can be achieved by loading pin 32 with a current of 150 μA. Then the system manager in the TDA8362 will not search for PAL or NTSC signals. Forcing to NTSC is not possible. For PAL/SECAM applications the input signal for the TDA8395 can be obtained from pin 27 (hue control) when this pin is connected to the positive supply rail via the 5 kΩ or 10 kΩ resistor. An external source selector is required by the TDA8395/TDA8362 combination for PAL/SECAM/NTSC applications.
RGB output circuit
The colour difference signals are matrixed with the luminance signal to obtain the RGB signals. Linear amplifiers have been chosen for the RGB inputs so that the circuit is suitable for incoming signals from the SCART connector. The contrast and brightness controls operate on internal and external signals.
The fast blanking pin has a second detection level at 3.5 V.
When this level is exceeded the RGB outputs are blanked so that “On-Screen-Display” signals can be applied to the outputs.
The output signal has an amplitude of approximately 4 V, black-to-white, with nominal input signals and nominal control settings. The nominal black level is 1.3 V.
March 1994 |
10 |
Philips Semiconductors |
Objective specification |
|
|
Integrated PAL and PAL/NTSC TV
TDA8360; TDA8361; TDA8362
processors
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC134).
SYMBOL |
PARAMETER |
MIN. |
MAX. |
UNIT |
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VP |
supply voltage |
− |
9.0 |
V |
Tstg |
storage temperature |
−25 |
+150 |
°C |
Tamb |
operating ambient temperature |
−25 |
+70 |
°C |
Tsol |
soldering temperature for 5 s |
− |
260 |
°C |
Tj |
maximum junction temperature (operating) |
− |
150 |
°C |
THERMAL RESISTANCE |
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SYMBOL |
PARAMETER |
THERMAL RESISTANCE |
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Rth j-a |
from junction to ambient in free air |
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40 K/W |
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CHARACTERISTICS
VP = 8 V; Tamb = 25 °C; unless otherwise specified.
SYMBOL |
PARAMETER |
CONDITIONS |
MIN. |
TYP. |
MAX. |
UNIT |
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Supplies |
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VP |
supply voltage (pin 10) |
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7.2 |
8.0 |
8.8 |
V |
IP |
supply current (pin 10) |
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− |
80 |
− |
mA |
IHOSC |
horizontal oscillator start current |
note 1 |
6.5 |
− |
− |
mA |
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(pin 36) |
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Ptot |
total power dissipation |
including start supply |
− |
0.7 |
− |
W |
IF circuit |
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VISION IF AMPLIFIER INPUTS (PINS 45 AND 46) |
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Vi(rms) |
input sensitivity (RMS value) |
note 2 |
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fi = 38.90 MHz |
− |
70 |
100 |
μV |
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fi = 45.75 MHz |
− |
70 |
100 |
μV |
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fi = 58.75 MHz |
− |
70 |
100 |
μV |
RI |
Input resistance (differential) |
note 3 |
− |
2 |
− |
kΩ |
CI |
Input capacitance (differential) |
note 3 |
− |
3 |
− |
pF |
Gcr |
gain control range |
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64 |
− |
− |
dB |
Vi(rms) |
maximum input signal (RMS value) |
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100 |
− |
− |
mV |
March 1994 |
11 |