Philips TDA8763AM-5-C4, TDA8763AM-5-C3, TDA8763AM-4-C4, TDA8763AM-4-C3, TDA8763AM-4-C1 Datasheet

...
0 (0)

INTEGRATED CIRCUITS

DATA SHEET

TDA8763A

10-bit high-speed low-power ADC

Product specification

1999 Jan 06

Supersedes data of 1997 Feb 07

File under Integrated Circuits, IC02

Philips Semiconductors

Product specification

 

 

10-bit high-speed low-power ADC

TDA8763A

 

 

 

 

FEATURES

10-bit resolution

Sampling rate up to 50 MHz

DC sampling allowed

One clock cycle conversion only

High signal-to-noise ratio over a large analog input frequency range (9.4 effective bits at 4.43 MHz full-scale input at fclk = 40 MHz)

No missing codes guaranteed

In-Range (IR) CMOS output

Levels TTL and CMOS compatible digital inputs

3 to 5 V CMOS digital outputs

Low-level AC clock input signal allowed

External reference voltage regulator

Power dissipation only 175 mW (typical)

Low analog input capacitance, no buffer amplifier required

No sample-and-hold circuit required.

ORDERING INFORMATION

APPLICATIONS

High-speed analog-to-digital conversion for:

Video data digitizing

Radar pulse analysis

Transient signal analysis

High energy physics research

ΣΔ modulators

Medical imaging.

GENERAL DESCRIPTION

The TDA8763A is a 10-bit high-speed low-power analog-to-digital converter (ADC) for professional video and other applications. It converts the analog input signal into 10-bit binary-coded digital words at a maximum sampling rate of 50 MHz. All digital inputs and outputs are TTL and CMOS compatible, although a low-level sine wave clock input signal is allowed.

The device requires an external source to drive its reference ladder. If the application requires that the reference is driven via internal sources the recommendation is to use the TDA8763.

TYPE NUMBER

 

PACKAGE

 

SAMPLING

 

 

 

NAME

DESCRIPTION

VERSION

FREQUENCY (MHz)

 

 

 

 

 

 

 

 

TDA8763AM/3

SSOP28

plastic shrink small outline package; 28 leads;

SOT341-1

30

 

 

 

 

TDA8763AM/4

SSOP28

SOT341-1

40

body width 5.3 mm

 

 

 

 

TDA8763AM/5

SSOP28

SOT341-1

50

 

 

 

 

 

 

1999 Jan 06

2

Philips Semiconductors

 

 

Product specification

 

 

 

 

 

 

 

 

10-bit high-speed low-power ADC

 

 

TDA8763A

 

 

 

 

 

 

 

 

QUICK REFERENCE DATA

 

 

 

 

 

 

 

 

 

 

 

 

 

SYMBOL

PARAMETER

 

CONDITIONS

MIN.

TYP.

MAX.

UNIT

 

 

 

 

 

 

 

 

VCCA

analog supply voltage

 

 

4.75

5.0

5.25

V

VCCD

digital supply voltage

 

 

4.75

5.0

5.25

V

VCCO

output stages supply voltage

 

 

3.0

3.3

5.25

V

ICCA

analog supply current

 

 

18

24

mA

ICCD

digital supply current

 

 

16

21

mA

ICCO

output stages supply current

 

fclk = 40 MHz; ramp input

1

2

mA

INL

integral non-linearity

 

fclk = 40 MHz; ramp input

±0.8

±2.0

LSB

DNL

differential non-linearity

 

fclk = 40 MHz; ramp input

±0.5

±0.9

LSB

fclk(max)

maximum clock frequency

 

 

 

 

 

 

 

TDA8763AM/3

 

 

30

MHz

 

TDA8763AM/4

 

 

40

MHz

 

TDA8763AM/5

 

 

50

MHz

 

 

 

 

 

 

 

 

Ptot

total power dissipation

 

fclk = 40 MHz; ramp input

175

247

mW

1999 Jan 06

3

Philips TDA8763AM-5-C4, TDA8763AM-5-C3, TDA8763AM-4-C4, TDA8763AM-4-C3, TDA8763AM-4-C1 Datasheet

Philips Semiconductors

Product specification

 

 

10-bit high-speed low-power ADC

TDA8763A

 

 

BLOCK DIAGRAM

 

 

 

 

VCCA

 

 

CLK

VCCD2

OE

 

 

 

 

 

 

3

 

 

1

11

10

 

 

 

 

 

 

 

 

CLOCK DRIVER

 

 

2

 

TC

 

 

 

 

 

 

 

TDA8763A

 

 

 

VRT

9

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

25

D9

MSB

 

 

 

 

 

 

 

 

 

24

D8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

23

D7

 

 

 

 

RLAD

 

 

 

 

22

D6

 

 

V I

8

 

 

 

 

 

 

21

D5

 

analog

ANALOG -TO - DIGITAL

LATCHES

 

CMOS

20

D4

data outputs

voltage input

 

 

 

CONVERTER

 

 

OUTPUTS

 

 

 

 

 

 

 

 

 

 

VRM

 

 

 

 

 

 

 

19

D3

 

 

7

 

 

 

 

 

 

18

D2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

17

D1

 

 

 

 

 

 

 

 

 

 

16

D0

LSB

 

VRB

6

 

 

 

 

 

 

13

VCCO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IN-RANGE LATCH

 

 

26

 

IR

 

 

 

 

 

 

CMOS OUTPUT

 

output

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

28

 

 

 

 

 

4

12

 

 

14

27

 

VCCD1

 

 

 

 

 

 

 

 

 

 

 

AGND

DGND2

 

 

OGND

DGND1

MBG913

 

 

analog ground

digital ground

output ground digital ground

Fig.1 Block diagram.

1999 Jan 06

4

Philips Semiconductors

Product specification

 

 

10-bit high-speed low-power ADC

TDA8763A

 

 

PINNING

 

 

SYMBOL

PIN

DESCRIPTION

 

 

 

 

 

CLK

1

clock input

 

 

 

 

 

 

 

 

 

 

 

2

twos complement input (active LOW)

 

TC

 

 

 

 

 

 

 

VCCA

3

analog supply voltage (+5 V)

 

 

AGND

4

analog ground

 

 

 

 

 

 

 

n.c.

5

not connected

 

 

 

 

 

 

 

VRB

6

reference voltage BOTTOM input

 

 

VRM

7

reference voltage MIDDLE input

 

 

VI

8

analog input voltage

 

 

VRT

9

reference voltage TOP input

 

 

 

 

 

10

output enable input (CMOS level

 

 

OE

 

 

 

 

 

 

 

input, active LOW)

 

 

 

 

 

VCCD2

11

digital supply voltage 2 (+5 V)

 

DGND2

12

digital ground 2

 

 

 

 

 

VCCO

13

supply voltage for output stages

 

 

 

 

 

 

(3 to 5 V)

 

 

 

 

 

OGND

14

output ground

 

 

 

 

 

n.c.

15

not connected

 

 

 

 

 

D0

16

data output; bit 0 (LSB)

 

 

 

 

 

D1

17

data output; bit 1

 

 

 

 

 

D2

18

data output; bit 2

 

 

 

 

 

D3

19

data output; bit 3

 

 

 

 

 

D4

20

data output; bit 4

 

 

 

 

 

D5

21

data output; bit 5

 

 

 

 

 

D6

22

data output; bit 6

 

 

 

 

 

D7

23

data output; bit 7

 

 

 

 

 

D8

24

data output; bit 8

 

 

 

 

 

D9

25

data output; bit 9 (MSB)

 

 

 

 

 

IR

26

in range data output

 

 

 

 

 

DGND1

27

digital ground 1

 

 

 

 

 

VCCD1

28

digital supply voltage 1 (+5 V)

hhandbook,halfphalfpage

 

 

 

VCCD1

CLK

1

 

28

 

 

 

 

 

 

 

TC

2

 

27

DGND1

VCCA

 

 

 

 

3

 

26

IR

 

 

 

 

 

 

 

AGND

4

 

25

D9

 

 

 

 

 

 

 

n.c.

5

 

24

D8

VRB

 

 

 

 

6

 

23

D7

VRM

 

 

 

 

7

TDA8763A

22

D6

 

VI

 

 

D5

 

8

 

21

VRT

 

 

 

 

9

 

20

D4

 

 

 

 

 

 

D3

 

OE

 

10

 

19

VCCD2

 

 

 

 

11

 

18

D2

 

 

 

 

 

 

 

DGND2

12

 

17

D1

V CCO

 

 

 

 

13

 

16

D0

 

 

 

 

 

 

 

OGND

14

 

15

n.c.

 

 

 

 

 

 

 

 

 

 

 

MBG914

 

Fig.2 Pin configuration.

1999 Jan 06

5

Philips Semiconductors

 

 

Product specification

 

 

 

 

 

 

 

10-bit high-speed low-power ADC

 

 

 

TDA8763A

 

 

 

 

 

 

 

LIMITING VALUES

 

 

 

 

 

In accordance with the Absolute Maximum Rating System (IEC 134).

 

 

 

 

 

 

 

 

 

 

 

SYMBOL

PARAMETER

CONDITIONS

MIN.

 

MAX.

UNIT

 

 

 

 

 

 

 

VCCA

analog supply voltage

note 1

0.3

 

+7.0

V

VCCD

digital supply voltage

note 1

0.3

 

+7.0

V

VCCO

output stages supply voltage

note 1

0.3

 

+7.0

V

VCC

supply voltage difference

 

 

 

 

 

 

VCCA VCCD

 

1.0

 

+1.0

V

 

VCCA VCCO

 

1.0

 

+4.0

V

 

VCCD VCCO

 

1.0

 

+4.0

V

VI

input voltage

referenced to AGND

0.3

 

+7.0

V

Vi(sw)(p-p)

AC input voltage for switching (peak-to-peak value)

referenced to DGND

 

VCCD

V

IO

output current

 

 

10

mA

Tstg

storage temperature

 

55

 

+150

°C

Tamb

operating ambient temperature

 

40

 

+85

°C

Tj

junction temperature

 

 

150

°C

Note

1. The supply voltages VCCA, VCCD and VCCO may have any value between 0.3 V and +7.0 V provided that the supply voltage differences VCC are respected.

HANDLING

Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling integrated circuits.

THERMAL CHARACTERISTICS

SYMBOL

PARAMETER

CONDITIONS

VALUE

UNIT

 

 

 

 

 

Rth(j-a)

thermal resistance from junction to ambient

in free air

110

K/W

1999 Jan 06

6

Philips Semiconductors

Product specification

 

 

10-bit high-speed low-power ADC

TDA8763A

 

 

CHARACTERISTICS

VCCA = V3 to V4 = 4.75 to 5.25 V; VCCD = V11 to V12 and V28 to V27 = 4.75 to 5.25 V; VCCO = V13 to V14 = 3.0 to 5.25 V; AGND and DGND shorted together; Tamb = 0 to +70 °C; typical values measured at VCCA = VCCD = 5 V and

VCCO = 3.3 V; Vi(p-p) = 2.0 V; CL = 15 pF and Tamb = 25 °C; unless otherwise specified.

SYMBOL

 

 

 

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

 

 

 

 

 

 

 

 

 

 

Supply

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCCA

 

analog supply voltage

 

4.75

5.0

5.25

V

VCCD1

 

digital supply voltage 1

 

4.75

5.0

5.25

V

VCCD2

 

digital supply voltage 2

 

4.75

5.0

5.25

V

VCCO

 

output stages supply voltage

 

3.0

3.3

5.25

V

VCC

 

supply voltage difference

 

 

 

 

 

 

 

 

VCCA VCCD

 

0.20

+0.20

V

 

 

 

VCCA VCCO

 

0.20

+2.25

V

 

 

 

VCCD VCCO

 

0.20

+2.25

V

ICCA

 

analog supply current

 

18

24

mA

ICCD

 

digital supply current

 

16

21

mA

ICCO

 

output stages supply current

fclk = 40 MHz; ramp input

1

2

mA

Inputs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CLOCK INPUT CLK (REFERENCED TO DGND); note 1

 

 

 

 

 

 

 

 

 

 

 

 

VIL

 

LOW-level input voltage

 

0

0.8

V

VIH

 

HIGH-level input voltage

 

2.0

VCCD

V

IIL

 

LOW-level input current

Vclk = 0.8 V

1

0

+1

μA

IIH

 

HIGH-level input current

Vclk = 2.0 V

2

10

μA

Zi

 

input impedance

fclk = 40 MHz

2

kΩ

Ci

 

input capacitance

 

2

pF

INPUTS

 

 

AND

 

(REFERENCED TO DGND); see Table 2

 

 

 

 

OE

 

TC

 

 

 

 

 

 

 

 

 

 

 

 

VIL

 

LOW-level input voltage

 

0

0.8

V

VIH

 

HIGH-level input voltage

 

2.0

VCCD

V

IIL

 

LOW-level input current

VIL = 0.8 V

1

μA

IIH

 

HIGH-level input current

VIH = 2.0 V

1

μA

VI (ANALOG INPUT VOLTAGE REFERENCED TO AGND)

 

 

 

 

 

 

 

 

 

 

 

 

IIL

 

LOW-level input current

VI = VRB = 1.3 V

0

μA

IIH

 

HIGH-level input current

VI = VRT = 3.67 V

35

μA

Zi

 

input impedance

fi = 4.43 MHz

8

kΩ

Ci

 

input capacitance

 

5

pF

Reference voltages for the resistor ladder see Table 1

 

 

 

 

 

 

 

 

 

 

 

 

VRB

 

reference voltage BOTTOM

 

1.2

1.3

2.45

V

VRT

 

reference voltage TOP

 

3.2

3.67

VCCA 0.8

V

Vdiff

 

differential reference voltage

 

2.0

2.37

3.0

V

 

 

 

VRT VRB

 

 

 

 

 

Iref

 

reference current

VRT VRB = 2.37 V

9.7

mA

1999 Jan 06

7

Philips Semiconductors

 

 

 

Product specification

 

 

 

 

 

 

 

10-bit high-speed low-power ADC

 

 

TDA8763A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

 

 

 

 

 

 

 

Rlad

resistor ladder

 

245

Ω

TCRlad

temperature coefficient of the

 

1860

ppm

 

resistor ladder

 

456

mΩ/K

 

 

 

 

 

 

 

Voffset(B)

offset voltage BOTTOM

VRT VRB = 2.37 V; note 2

175

mV

Voffset(T)

offset voltage TOP

VRT VRB = 2.37 V; note 2

175

mV

Vi(p-p)

analog input voltage

note 3

1.70

2.02

2.55

V

 

(peak-to-peak value)

 

 

 

 

 

 

 

 

 

 

 

 

Outputs

 

 

 

 

 

 

 

 

 

 

 

DIGITAL OUTPUTS D9 TO D0 AND IR (REFERENCED TO OGND)

 

 

 

 

 

 

 

 

 

 

 

VOL

LOW-level output voltage

IOL = 1 mA

0

0.5

V

VOH

HIGH-level output voltage

IOH = 1 mA

VCCO 0.5

VCCO

V

IOZ

output current in 3-state mode

0.5 V < Vo < VCCO

20

+20

μA

Switching characteristics

 

 

 

 

 

 

 

 

 

 

 

CLOCK INPUT CLK; see Fig.4; note 1

 

 

 

 

 

 

 

 

 

 

 

 

fclk(max)

maximum clock frequency

 

 

 

 

 

 

TDA8763AM/3

 

30

MHz

 

TDA8763AM/4

 

40

MHz

 

TDA8763AM/5

 

50

MHz

 

 

 

 

 

 

 

tCPH

clock pulse width HIGH

full effective bandwidth

8.5

ns

tCPL

clock pulse width LOW

full effective bandwidth

5.5

ns

Analog signal processing

 

 

 

 

 

 

 

 

 

 

 

 

LINEARITY

 

 

 

 

 

 

 

 

 

 

 

 

 

INL

integral non-linearity

fclk = 40 MHz; ramp input

±0.8

±2.0

LSB

DNL

differential non-linearity

fclk = 40 MHz; ramp input

±0.5

±0.9

LSB

Eoffset

offset error

middle code; VRB = 1.3 V;

±1

LSB

 

 

VRT = 3.67 V

 

 

 

 

EG

gain error (from device to

VRB = 1.3 V; VRT = 3.67 V;

±0.1

%

 

device) using external

note 4

 

 

 

 

 

reference voltage

 

 

 

 

 

 

 

 

 

 

 

 

1999 Jan 06

8

Loading...
+ 16 hidden pages