INTEGRATED CIRCUITS
TDA8772; TDA8772A
Triple 8-bit video digital-to-analog converter
Product specification |
1995 Mar 09 |
Supersedes data of May 1994
File under Integrated Circuits, IC02
Philips Semiconductors
Philips Semiconductors |
Product specification |
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Triple 8-bit video digital-to-analog
TDA8772; TDA8772A
converter
FEATURES
∙8-bit resolution
∙Sampling rate up to
35 MHz for TDA8772H/3, TDA8772AH/3
85 MHz for TDA8772H/8, TDA8772AH/8
∙Internal reference voltage regulator
∙No deglitching circuit required
∙SYNC, BLANK control inputs
∙3 independent clock inputs (one per DAC)
∙1 V output voltage range
∙75 Ω output load
∙TDA8772A has BLANK control input on the GREEN channel only while TDA8772 has it on the 3 channels
∙Single 5 V power supply
∙44-pin QFP package.
APPLICATIONS
∙General purpose high-speed digital-to-analog conversion
∙Digital TV
∙Graphic display
∙Desktop video processing.
ORDERING INFORMATION
GENERAL DESCRIPTION
The TDA8772, TDA8772A are triple 8-bit video digital-to-analog converters (DACs). They convert the digital input signals into analog voltage outputs at a maximum conversion rate of 35 MHz (TDA8772H/3, TDA8772AH/3) and 85 MHz (TDA8772H/8, TDA8772AH/8).
The DACs are based on resistor-string architecture with integrated output buffers. The output voltage range is determined by a built-in reference source.
The devices are fabricated in a 5 V CMOS process that ensures high functionality with low power dissipation.
TYPE NUMBER |
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PACKAGE |
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SAMPLING |
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PINS |
PIN POSITION |
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MATERIAL |
CODE |
FREQUENCY |
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TDA8772H/3 |
44 |
QFP44 |
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plastic |
SOT307B |
35 MHz |
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TDA8772AH/3 |
44 |
QFP44 |
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plastic |
SOT307B |
35 MHz |
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TDA8772H/8 |
44 |
QFP44 |
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plastic |
SOT307B |
85 MHz |
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TDA8772AH/8 |
44 |
QFP44 |
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plastic |
SOT307B |
85 MHz |
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1995 Mar 09 |
2 |
Philips Semiconductors |
Product specification |
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Triple 8-bit video digital-to-analog
TDA8772; TDA8772A
converter
QUICK REFERENCE DATA
SYMBOL |
PARAMETER |
CONDITIONS |
MIN. |
TYP. |
MAX. |
UNIT |
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VDDA |
analog supply voltage |
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4.5 |
5.0 |
5.5 |
V |
VDDD |
digital supply voltage |
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4.5 |
5.0 |
5.5 |
V |
IDDA |
analog supply current |
RL = 75 Ω; note 1 |
40 |
65 |
100 |
mA |
IDDD |
digital supply current |
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TDA8772H/3, TDA8772AH/3 |
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− |
7 |
16 |
mA |
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TDA8772H/8, TDA8772AH/8 |
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− |
16 |
27 |
mA |
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INL |
integral non-linearity2 |
fclk = 35 MHz; ramp input |
− |
±0.5 |
±1 |
LSB |
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fclk = 85 MHz; ramp input |
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±0.75 |
±1.2 |
LSB |
DNL |
differential non-linearity |
fclk = 35 MHz; ramp input |
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±0.25 |
±0.5 |
LSB |
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fclk = 85 MHz; ramp input |
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±0.5 |
±0.75 |
LSB |
fclk(max) |
maximum clock frequency |
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TDA8772H/3, TDA8772AH/3 |
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35 |
− |
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MHz |
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TDA8772H/8, TDA8772AH/8 |
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85 |
− |
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MHz |
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Ptot |
total power dissipation |
note 1 |
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TDA8772H/3, TDA8772AH/3 |
RL = 75 Ω; fclk = 35 MHz |
180 |
360 |
640 |
mW |
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TDA8772H/8, TDA8772AH/8 |
RL = 75 Ω; fclk = 85 MHz |
180 |
405 |
700 |
mW |
Note
1.Minimum and maximum data of current and power consumption are measured in worse case conditions: for minimum data, all digital inputs are at logic level 0 while for maximum data, all digital inputs are at logic level 1.
1995 Mar 09 |
3 |
Philips Semiconductors |
Product specification |
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Triple 8-bit video digital-to-analog
TDA8772; TDA8772A
converter
BLOCK DIAGRAMS |
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handbook, full pagewidth |
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V DDA |
V DDD |
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RED |
4 |
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35,39,43 |
10,32 |
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8–5 |
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41 |
reference |
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digital inputs |
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4 |
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current input |
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(bits R0 to R3) |
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(I REFB ) |
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TDA8772 |
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LSB |
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21 |
RED |
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DECODER |
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clock input |
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RED |
4 |
4–1 |
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MSB |
RESISTOR |
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44 |
RED |
digital inputs |
4 |
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DECODER |
STRING |
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analog output |
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(bits R4 to R7) |
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GREEN |
4 |
20–17 |
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digital inputs |
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4 |
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(bits G0 to G3) |
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LSB |
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22 |
GREEN |
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DECODER |
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clock input |
GREEN |
4 |
16–13 |
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MSB |
RESISTOR |
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40 |
GREEN |
digital inputs |
4 |
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DECODER |
STRING |
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analog output |
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(bits G4 to G7) |
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BLUE |
4 |
31–28 |
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digital inputs |
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4 |
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(bits B0 to B3) |
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LSB |
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23 |
BLUE |
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DECODER |
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clock input |
BLUE |
4 |
27–24 |
MSB |
RESISTOR |
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36 |
BLUE |
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digital inputs |
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4 |
DECODER |
STRING |
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analog output |
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(bits B4 to B7) |
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BLANK |
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12 |
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control input |
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38 |
reference current |
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CONTROL |
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BANDGAP |
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11 |
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input for internal |
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REGISTER |
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REFERENCE |
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SYNC |
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reference |
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control input |
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34 |
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37,42 |
9,33 |
(I REFA ) |
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reference voltage |
VSSA |
V SSD |
MBB661 - 2 |
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decoupling input |
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(V REF ) |
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Fig.1 Block diagram for TDA8772.
1995 Mar 09 |
4 |
Philips Semiconductors |
Product specification |
|
|
Triple 8-bit video digital-to-analog
TDA8772; TDA8772A
converter
handbook, full pagewidth |
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V DDA |
V DDD |
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RED |
4 |
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35,39,43 |
10,32 |
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8–5 |
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41 |
reference |
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digital inputs |
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4 |
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current input |
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(bits R0 to R3) |
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(I REFB ) |
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TDA8772A |
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LSB |
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21 |
RED |
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DECODER |
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clock input |
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RED |
4 |
4–1 |
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MSB |
RESISTOR |
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44 |
RED |
digital inputs |
4 |
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DECODER |
STRING |
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analog output |
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(bits R4 to R7) |
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GREEN |
4 |
20–17 |
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digital inputs |
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4 |
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(bits G0 to G3) |
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LSB |
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22 |
GREEN |
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DECODER |
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clock input |
GREEN |
4 |
16–13 |
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MSB |
RESISTOR |
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40 |
GREEN |
digital inputs |
4 |
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DECODER |
STRING |
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analog output |
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(bits G4 to G7) |
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BLUE |
4 |
31–28 |
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digital inputs |
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4 |
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(bits B0 to B3) |
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LSB |
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23 |
BLUE |
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DECODER |
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clock input |
BLUE |
4 |
27–24 |
MSB |
RESISTOR |
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36 |
BLUE |
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digital inputs |
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4 |
DECODER |
STRING |
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analog output |
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(bits B4 to B7) |
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BLANK |
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12 |
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control input |
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38 |
reference current |
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CONTROL |
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BANDGAP |
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11 |
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input for internal |
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REGISTER |
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REFERENCE |
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SYNC |
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reference |
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control input |
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34 |
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37,42 |
9,33 |
(I REFA ) |
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reference voltage |
VSSA |
V SSD |
MLB724 |
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decoupling input |
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(V REF ) |
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Fig.2 Block diagram for TDA8772A.
1995 Mar 09 |
5 |
Philips Semiconductors |
Product specification |
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Triple 8-bit video digital-to-analog
TDA8772; TDA8772A
converter
PINNING
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SYMBOL |
PIN |
DESCRIPTION |
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R7 |
1 |
RED digital input data; bit 7 (MSB) |
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R6 |
2 |
RED digital input data; bit 6 |
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R5 |
3 |
RED digital input data; bit 5 |
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R4 |
4 |
RED digital input data; bit 4 |
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R3 |
5 |
RED digital input data; bit 3 |
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R2 |
6 |
RED digital input data; bit 2 |
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R1 |
7 |
RED digital input data; bit 1 |
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R0 |
8 |
RED digital input data; bit 0 (LSB) |
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VSSD1 |
9 |
digital supply ground 1 |
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VDDD1 |
10 |
digital supply voltage 1 |
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11 |
composite sync control input; for GREEN channel only (active LOW) |
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SYNC |
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12 |
composite blank control input (active LOW) |
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BLANK |
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G7 |
13 |
GREEN digital input data; bit 7 (MSB) |
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G6 |
14 |
GREEN digital input data; bit 6 |
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G5 |
15 |
GREEN digital input data; bit 5 |
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G4 |
16 |
GREEN digital input data; bit 4 |
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G3 |
17 |
GREEN digital input data; bit 3 |
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G2 |
18 |
GREEN digital input data; bit 2 |
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G1 |
19 |
GREEN digital input data; bit 1 |
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G0 |
20 |
GREEN digital input data; bit 0 (LSB) |
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CLKR |
21 |
RED clock input |
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CLKG |
22 |
GREEN clock input |
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CLKB |
23 |
BLUE clock input |
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B7 |
24 |
BLUE digital input data; bit 7 (MSB) |
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B6 |
25 |
BLUE digital input data; bit 6 |
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B5 |
26 |
BLUE digital input data; bit 5 |
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B4 |
27 |
BLUE digital input data; bit 4 |
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B3 |
28 |
BLUE digital input data; bit 3 |
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B2 |
29 |
BLUE digital input data; bit 2 |
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B1 |
30 |
BLUE digital input data; bit 1 |
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B0 |
31 |
BLUE digital input data; bit 0 (LSB) |
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VDDD2 |
32 |
digital supply voltage 2 |
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VSSD2 |
33 |
digital supply ground 2 |
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VREF |
34 |
decoupling input for reference voltage |
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VDDA1 |
35 |
analog supply voltage 1 |
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OUTB |
36 |
BLUE analog output |
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VSSA1 |
37 |
analog supply ground 1 |
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IREFA |
38 |
reference current input for internal reference |
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VDDA2 |
39 |
analog supply voltage 2 |
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OUTG |
40 |
GREEN analog output |
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1995 Mar 09 |
6 |