Philips TDA9859 Datasheet

INTEGRATED CIRCUITS

DATA SHEET

TDA9859

Universal hi-fi audio processor for TV

Preliminary specification			1997 Sep 01
File under Integrated Circuits, IC02

Philips Semiconductors	Preliminary specification
Universal hi-fi audio processor for TV	TDA9859

FEATURES

∙Multi-source selector switches six AF inputs (three stereo sources or six mono sources)

∙Each of the input signals can be switched to each of the outputs (crossbar switch)

∙Outputs for loudspeaker channel and peri-TV connector (SCART)

∙Switchable spatial stereo and pseudo stereo effects

∙Audio surround decoder can be added externally

∙Two general purpose logic output ports

∙I2C-bus control of all functions.

QUICK REFERENCE DATA

GENERAL DESCRIPTION

The TDA9859 provides control facilities for the main and the SCART channel of a TV set. Due to extended switching possibilities, signals from three stereo sources can be handled.

SYMBOL	PARAMETER	MIN.	TYP.	MAX.	UNIT
VP	positive supply voltage (pin 6)	7.2	8.0	8.8	V
IP	supply current	−	25	−	mA
Vi(rms)	input signal levels for 0 dB gain (RMS value)	2	−	−	V
Vo(rms)	output signal levels for 0 dB gain (RMS value)	2	−	−	V
Gv	voltage gain in main channel
	volume control (1 dB steps, balance included)	−63	−	+15	dB
	mute	−80	−	−	dB
	bass control (1.5 dB steps)	−12	−	+15	dB
	treble control (3 dB steps)	−12	−	+12	dB
THD	total harmonic distortion	−	0.1	−	%
S/N	signal-to-noise ratio	−	85	−	dB
Tamb	operating ambient temperature	0	−	70	°C

ORDERING INFORMATION

TYPE		PACKAGE
NUMBER	NAME	DESCRIPTION	VERSION
TDA9859	SDIP32	plastic shrink dual in-line package; 32 leads (400 mil)	SOT232-1

1997 Sep 01

2

1997Sep01

SCART

ewidth

I2C-bus

DIAGRAMBLOCK

Universalfi-hi

SemiconductorsPhilips

33 nF

output

MAD SDA SCL

L

R

5.6 nF

SCOUTL SCOUTR

(1)

CBL2

CTL

CBL1

26

7

22

21

19

25

17

16

AIN L

28

31

P2

audio

L

I2C-BUS

AUX

470 nF

TDA9859

AINR

30

INTERFACE

2

P1

R

MULTIPLE

470 nF

SOURCE

processor

SCIN L

1

AND MODE

L

SELECTOR

audio

470 nF

SCART

inputs

SCIN R

32

R

470 nF

(CROSSBAR

STEREO

18

LOUTL

MIN L

3

L

SWITCH)

SPATIAL

L

MAIN

470 nF

loudspeaker

for

STEREO

MIN R

5

MUTE

channel

R

PSEUDO

outputs

TV

470 nF

15

LOUTR

STEREO

R

3

REFERENCE

FORCED

VP

6

VOLUME

BASS

TREBLE

VOLUME

MONO

+8 V

VOLTAGE

CONTROL

CONTROL

CONTROL

BALANCE

4

8

24

9

23

10

29

27

11

12

14

CSMO

100

GND

MOUTL MOUTR LINL

LINR

CBR1

CBR2

MHA778

(1)

μF

C

C

CTR

5.6 nF

PS1

PS2

L

R

33 nF

LINE output or optional

extended bass control (1)

surround sound decoder

11 (22)

12 (21)

connection

68 nF

0.15 μF

13 kΩ

TDA9859

specificationPreliminary

(1) For extended bass control, the capacitor between CBR/L1 and CBR/L2 should be replaced by the extended bass control network.

Fig.1

Block diagram and application circuit.

Philips Semiconductors	Preliminary specification
Universal hi-fi audio processor for TV	TDA9859

PINNING

SYMBOL	PIN	DESCRIPTION
SCINL	1	SCART input; left channel
P1	2	port 1 output
MINL	3	MAIN input; left channel
CSMO	4	smoothing capacitor of reference
		voltage
MINR	5	MAIN input; right channel
VP	6	supply voltage
SCOUTR	7	SCART output; right channel
GND	8	ground
MOUTR	9	MAIN output; right channel
LINR	10	input to right loudspeaker channel
CBR1	11	bass capacitor connection 1;
		right channel
CBR2	12	bass capacitor connection 2;
		right channel
n.c.	13	not connected
CTR	14	treble capacitor connection;
		right channel
LOUTR	15	loudspeaker output; right channel
SCL	16	serial clock input; I2C-bus
SDA	17	serial data input/output; I2C-bus
LOUTL	18	loudspeaker output; left channel
CTL	19	treble capacitor connection;
		left channel
n.c.	20	not connected
CBL2	21	bass capacitor connection 2;
		left channel
CBL1	22	bass capacitor connection 1;
		left channel
LINL	23	input to left loudspeaker channel
MOUTL	24	MAIN output; left channel
MAD	25	module address select input
SCOUTL	26	SCART output; left channel
CPS2	27	pseudo stereo capacitor 2
AINL	28	AUX input; left channel
CPS1	29	pseudo stereo capacitor 1
AINR	30	AUX input; right channel
P2	31	port 2 output
SCINR	32	SCART input signal RIGHT

handbook, halfpage
SCINL	1		32	SCINR
P1				P2
	2		31
MINL				AINR
	3		30
CSMO				CPS1
	4		29
MINR				AINL
	5		28
VP				CPS2
	6		27
SCOUTR				SCOUTL
	7		26
GND
	8	TDA9859	25	MAD
MOUTR				MOUTL
	9		24
LINR				LINL
	10		23
CBR1				CBL1
	11		22
CBR2				CBL2
	12		21
				n.c.
n.c.	13		20
CTR				CTL
	14		19
LOUTR				LOUTL
	15		18
				SDA
SCL	16		17
		MHA779

Fig.2 Pin configuration.

1997 Sep 01

4

Philips Semiconductors	Preliminary specification
Universal hi-fi audio processor for TV	TDA9859

FUNCTIONAL DESCRIPTION

The TDA9859 consists of the following functions:

∙Source select switching block

∙Loudspeaker channel with effect controls

∙Two port outputs for general purpose

∙I2C-bus control.

Source select switching block

The TDA9859 selects and switches the input signals from three stereo or six mono sources MAIN, AUX and SCART (see Fig.1) to the outputs SCART and loudspeaker (crossbar-switching; Table 4). The main channel (LINE outputs) is looped outside the circuit (from pins 9 and 24 to pins 10 and 23), so signals can be used as LINE output or a surround sound decoder can be inserted.

Loudspeaker channel

Volume control is divided into volume control common and volume control left/right. The common part

(−40 to +15 dB) controls the left and right channels

LIMITING VALUES

simultaneously; the left/right part (−23 to 0 dB) controls the volume of left and right channels independently. Treble control provides a control range from −12 to +12 dB and bass control from −12 to +15 dB. Extended bass control can be provided by an external T-network (see Fig.1) from −15 to +19 dB (2 dB steps).

Effect controls

‘Linear stereo’, ‘stereo with spatial effect (30% or 52% anti-phase crosstalk)’ and ‘forced mono with or without pseudo-stereo effect’ are controlled by three bits. A muting of 85 dB is provided.

I2C-bus control

All settings of control are stored in subaddress registers. Data transmission is simplified by auto-incrementing the subaddresses. The on-chip Power-on reset sets the mute bit to active, so both the SCART and the loudspeaker outputs are muted.

The muting can be switched off by writing a ‘0’ (non-muted) into the mute control bits.

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL	PARAMETER	MIN.	MAX.	UNIT
VP	supply voltage (pin 6)	0	10	V
Vn	voltage on all pins, ground excluded	0	VP	V
IO	output current
	at LOUT and SCOUT pins	−	2.5	mA
	at port output pins	−	1.5	mA
Ptot	total power dissipation	−	850	mW
Tamb	operating ambient temperature	0	70	°C
Tstg	storage temperature	−25	+150	°C
Ves	electrostatic handling for all pins; note 1	−	±300	V
	electrostatic handling for all pins; note 2	−	±2000	V

Notes

1.Equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor (Machine Model).

2.Equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor (Human Body Model).

THERMAL CHARACTERISTICS

SYMBOL	PARAMETER	CONDITIONS	VALUE	UNIT
Rth(j-a)	thermal resistance from junction to ambient	in free air	60	K/W

1997 Sep 01

5

Philips Semiconductors	Preliminary specification
Universal hi-fi audio processor for TV	TDA9859

CHARACTERISTICS

VP = 8 V; Tamb = 25 °C; treble and bass in linear positions (0 dB); volume control left/right 0 dB; spatial function, pseudo-stereo function and forced-mono function in off position and measurements taken in Fig.1; unless otherwise specified.

SYMBOL	PARAMETER	CONDITIONS	MIN.	TYP.	MAX.	UNIT
VP	supply voltage (pin 6)		7.2	8.0	8.8	V
IP	supply current (pin 6)		−	25	−	mA
Vref	internal reference voltage		−	0.5VP	−	V
V4	voltage at pin 4		−	VP − 0.1	−	V
DC voltage on pins
VI	DC input voltage at pins 1, 3, 5, 10, 23,		−	0.5VP	−	V
	28, 30 and 32 (inputs SCIN, MIN, LIN
	and AIN)
VO	DC output voltage at pins 7, 9, 15, 18,		−	0.5VP	−	V
	24, 26 (outputs SCOUT, MOUT
	and LOUT)
VC	DC voltage on capacitors (pins 11, 12,		−	0.5VP	−	V
	14, 19, 21, 22, 27 and 29)
Audio select switch; line and SCART outputs (controlled via I2C-bus); see Table 4
Vi(rms)	maximum AF input signal on	THD ≤ 0.5% on output	2	−	−	V
	pins SCIN, MIN and AIN (RMS value)	pins
Ri	input resistance (pins SCIN, MIN and		20	30	40	kΩ
	AIN)
B−0.5 dB	−0.5 dB bandwidth for pins SCOUT,		20	−	20 000	Hz
	MOUT and LOUT.
Vo(rms)	maximum AF output signal on	THD ≤ 0.5%	2	−	−	V
	pins SCOUT and MOUT (RMS value)
RL	allowed external load resistance
	on output (pins MOUT)		10	−	−	kΩ
	on output (pins SCOUT)		5	−	−	kΩ
Gv	voltage gain from any input to SCART		−	0	−	dB
	and MAIN outputs
αcr	switch crosstalk on outputs between	unused inputs connected	−	90	−	dB
	AF inputs at f = 10 kHz	to ground
Volume control common (f = 1 kHz, 55 steps)
Vi(rms)	maximum input signal (RMS value;	Gv = 0; THD ≤ 0.5% on	2	−	−	V
	pins LIN)	output pins 15 and 18
Ri	input resistance (pins LIN)		7.5	10	−	kΩ
Gv	volume control common voltage gain
	nominal		−40	−	+15	dB
	minimum		−38	−	+14	dB

1997 Sep 01

6