INTEGRATED CIRCUITS
TDA4665
Baseband delay line
Product specification |
1996 Dec 17 |
Supersedes data of 1995 Oct 30
File under Integrated Circuits, IC02
Philips Semiconductors |
Product specification |
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Baseband delay line |
TDA4665 |
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FEATURES
∙Two comb filters, using the switched-capacitor technique, for one line delay time (64 μs)
∙Adjustment-free application
∙No crosstalk between SECAM colour carriers (diaphoty)
∙Handles negative or positive colour-difference input signals
∙Clamping of AC-coupled input signals (±(R−Y) and
±(B−Y))
∙VCO without external components
∙3 MHz internal clock signal derived from a 6 MHz CCO, line-locked by the sandcastle pulse (64 μs line)
∙Sample-and-hold circuits and low-pass filters to suppress the 3 MHz clock signal
∙Addition of delayed and non-delayed output signals
∙Output buffer amplifiers
∙Comb filtering functions for NTSC colour-difference signals to suppress cross-colour.
QUICK REFERENCE DATA
GENERAL DESCRIPTION
The TDA4665 is an integrated baseband delay line circuit with one line delay. It is suitable for decoders with colour-difference signal outputs ±(R−Y) and ±(B−Y).
SYMBOL |
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PARAMETER |
MIN. |
TYP. |
MAX. |
UNIT |
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VP1 |
analog supply voltage (pin 9) |
4.5 |
5 |
6 |
V |
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VP2 |
digital supply voltage (pin 1) |
4.5 |
5 |
6 |
V |
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IP(tot) |
total supply current |
− |
5.5 |
7.0 |
mA |
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Vi(p-p) |
±(R−Y) input signal PAL/NTSC (peak-to-peak value; pin 16) |
− |
525 |
− |
mV |
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±(B−Y) input signal PAL/NTSC (peak-to-peak value; pin 14) |
− |
665 |
− |
mV |
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±(R−Y) input signal SECAM (peak-to-peak value; pin 16) |
− |
1.05 |
− |
V |
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±(B−Y) input signal SECAM (peak-to-peak value; pin 14) |
− |
1.33 |
− |
V |
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Gv |
gain Vo / Vi of colour-difference output signals |
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V11 / V16 for PAL and NTSC |
5.3 |
5.8 |
6.3 |
dB |
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V12 / V14 for PAL and NTSC |
5.3 |
5.8 |
6.3 |
dB |
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V11 / V16 for SECAM |
−0.6 |
−0.1 |
+0.4 |
dB |
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V12 / V14 for SECAM |
−0.6 |
−0.1 |
+0.4 |
dB |
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ORDERING INFORMATION |
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TYPE |
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PACKAGE |
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NUMBER |
NAME |
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DESCRIPTION |
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VERSION |
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TDA4665 |
DIP16 |
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plastic dual in-line package; 16 leads (300 mil) |
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SOT38-4 |
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TDA4665T |
SO16 |
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plastic small outline package; 16 leads; body width 3.9 mm |
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SOT109-1 |
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1996 Dec 17 |
2 |
17 Dec1996 |
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DIAGRAMBLOCK |
±(R−Y) |
16 |
SIGNAL |
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CLAMPING |
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11 |
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±(R−Y) |
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LINE |
SAMPLE- |
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LP |
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MEMORY |
AND-HOLD |
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colour-difference |
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pre-amplifiers |
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input signals |
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addition |
output |
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colour-difference |
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stages |
buffers |
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output signals |
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±(B−Y) |
14 |
SIGNAL |
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CLAMPING |
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12 |
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3 |
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±(B−Y) |
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LINE |
SAMPLE- |
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LP |
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9 |
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MEMORY |
AND-HOLD |
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VP1 |
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analog supply |
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2 |
n.c. |
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TDA4665 |
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6 |
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FREQUENCY |
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3 MHz shifting clock |
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n.c. |
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sandcastle |
5 |
SANDCASTLE |
DIVIDER |
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13 |
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n.c. |
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pulse input |
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DETECTOR |
PHASE |
BY 192 |
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15 |
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n.c. |
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DETECTOR |
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LP |
6 MHz |
DIVIDER |
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7 |
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CCO |
BY 2 |
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i.c. |
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10 |
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digital supply |
1 |
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3 |
4, 8 |
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GND1 |
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VP2 |
GND2 |
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MED848 |
Fig.1 Block diagram.
line delay Baseband
TDA4665
Semiconductors Philips
specification Product
Philips Semiconductors |
Product specification |
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Baseband delay line |
TDA4665 |
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PINNING
SYMBOL |
PIN |
DESCRIPTION |
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VP2 |
1 |
+5 V supply voltage for digital part |
n.c. |
2 |
not connected |
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GND2 |
3 |
ground for digital part (0 V) |
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i.c. |
4 |
internally connected |
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SAND |
5 |
sandcastle pulse input |
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n.c. |
6 |
not connected |
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i.c. |
7 |
internally connected |
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i.c. |
8 |
internally connected |
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VP1 |
9 |
+5 V supply voltage for analog part |
GND1 |
10 |
ground for analog part (0 V) |
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Vo(R−Y) |
11 |
±(R−Y) output signal |
Vo(B−Y) |
12 |
±(B−Y) output signal |
n.c. |
13 |
not connected |
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Vi(B−Y) |
14 |
±(B−Y) input signal |
n.c. |
15 |
not connected |
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Vi(R−Y) |
16 |
±(R−Y) input signal |
LIMITING VALUES
handbook, halfpage
VP2 |
1 |
16 |
Vi(R−Y) |
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n.c. |
2 |
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15 |
n.c. |
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GND2 |
3 |
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14 |
Vi(B−Y) |
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i.c. |
4 |
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13 |
n.c. |
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TDA4665 |
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SAND |
5 |
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12 |
Vo(B−Y) |
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n.c. |
6 |
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11 |
Vo(R−Y) |
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i.c. |
7 |
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10 |
GND1 |
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i.c. |
8 |
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9 |
VP1 |
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MED849 |
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Fig.2 Pin configuration.
In accordance with the Absolute Maximum Rating System (IEC 134). Ground pins 3 and 10 connected together.
SYMBOL |
PARAMETER |
MIN. |
MAX. |
UNIT |
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VP1 |
analog supply voltage (pin 9) |
−0.5 |
+7 |
V |
VP2 |
digital supply voltage (pin 1) |
−0.5 |
+7 |
V |
V5 |
voltage on pin 5 |
−0.5 |
VP + 1.0 |
V |
Vn |
voltage on pins 11, 12, 14 and 16 |
−0.5 |
VP |
V |
Tstg |
storage temperature |
−25 |
+150 |
°C |
Tamb |
operating ambient temperature |
0 |
70 |
°C |
VESD |
electrostatic handling for all pins; note 1 |
− |
±500 |
V |
Note
1. Equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor.
THERMAL CHARACTERISTICS
SYMBOL |
PARAMETER |
VALUE |
UNIT |
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Rth j-a |
thermal resistance from junction to ambient in free air |
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SOT38-4 |
75 |
K/W |
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SOT109-1 |
220 |
K/W |
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1996 Dec 17 |
4 |