DUAL DECADE COUNTER
The SN54/74LS490 contains a pair of high-speed 4-stage ripple counters. Each half of the SN54/74LS490 has individual Clock, Master Reset and Master Set (Preset 9) inputs. Each section counts in the 8, 4, 2, 1 BCD code.
•Dual Version of SN54/74LS490
•Individual Asynchronous Clear and Preset to 9 for Each Counter
•Count Frequency Ð Typically 65 MHz
•Input Clamp Diodes Limit High-Speed Termination Effects
CONNECTION DIAGRAM DIP (TOP VIEW)
VCC CPb MRb Q0b MSb Q1b Q2b Q3b
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15 |
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14 |
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13 |
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12 |
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11 |
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10 |
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9 |
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1 |
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4 |
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8 |
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CPa |
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MRa |
Q0a |
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MSa |
Q1a |
Q2a |
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Q3a |
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GND |
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PIN NAMES |
LOADING (Note a) |
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HIGH |
LOW |
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MS |
Master Set (Set to 9) Input |
0.5 |
U.L. |
0.25 |
U.L. |
MR |
Master Reset |
0.5 |
U.L. |
0.25 |
U.L. |
CP |
Clock Input (Active LOW Going Edge) |
1.5 |
U.L. |
1.5 |
U.L. |
Q0 ± Q3 |
Counter Outputs (Note b) |
10 |
U.L. |
5 (2.5) |
U.L. |
NOTES:
a)1 TTL Unit Load (U.L.) = 40 μA HIGH/1.6 mA LOW.
b)The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74) Temperature Ranges.
LOGIC DIAGRAM (ONE HALF SHOWN)
MS
4
12
1 |
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CP 15 |
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K |
J |
K |
J |
K |
J |
K |
CP J |
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CD |
SD |
CD |
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CD |
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CD |
SD |
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Q |
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Q |
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Q |
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Q |
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2 |
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MR |
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14 |
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3 |
0Q |
13 |
51 |
Q11 |
62 Q10 |
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7 |
3 |
Q9 |
SN54/74LS490
DUAL DECADE COUNTER
LOW POWER SCHOTTKY
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J SUFFIX |
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CERAMIC |
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CASE 620-09 |
16 |
1 |
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N SUFFIX |
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PLASTIC |
16 |
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CASE 648-08 |
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1 |
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D SUFFIX |
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16 |
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SOIC |
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CASE 751B-03 |
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1 |
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ORDERING INFORMATION
SN54LSXXXJ Ceramic
SN74LSXXXN Plastic
SN74LSXXXD SOIC
TRUTH TABLE
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OUTPUTS |
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COUNT |
Q3 |
Q2 |
Q1 |
Q0 |
0 |
L |
L |
L |
L |
1 |
L |
L |
L |
H |
2 |
L |
L |
H |
L |
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3 |
L |
L |
H |
H |
4 |
L |
H |
L |
L |
5 |
L |
H |
L |
H |
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6 |
L |
H |
H |
L |
7 |
L |
H |
H |
H |
8 |
H |
L |
L |
L |
9 |
H |
L |
L |
H |
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FAST AND LS TTL DATA
5-563
SN54 / 74LS490
GUARANTEED OPERATING RANGES
Symbol |
Parameter |
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Min |
Typ |
Max |
Unit |
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VCC |
Supply Voltage |
54 |
4.5 |
5.0 |
5.5 |
V |
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74 |
4.75 |
5.0 |
5.25 |
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TA |
Operating Ambient Temperature Range |
54 |
± 55 |
25 |
125 |
°C |
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74 |
0 |
25 |
70 |
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IOH |
Output Current Ð High |
54, 74 |
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± 0.4 |
mA |
IOL |
Output Current Ð Low |
54 |
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4.0 |
mA |
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74 |
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8.0 |
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DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
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Limits |
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Symbol |
Parameter |
Min |
Typ |
Max |
Unit |
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Test Conditions |
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VIH |
Input HIGH Voltage |
2.0 |
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V |
Guaranteed Input HIGH Voltage for |
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All Inputs |
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VIL |
Input LOW Voltage |
54 |
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0.7 |
V |
Guaranteed Input LOW Voltage for |
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74 |
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0.8 |
All Inputs |
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VIK |
Input Clamp Diode Voltage |
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± 0.65 |
± 1.5 |
V |
VCC = MIN, IIN = ±18 mA |
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VOH |
Output HIGH Voltage |
54 |
2.5 |
3.5 |
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V |
VCC = MIN, IOH = MAX, VIN = VIH |
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74 |
2.7 |
3.5 |
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V |
or VIL per Truth Table |
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54, 74 |
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0.25 |
0.4 |
V |
I = 4.0 mA |
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VCC = VCC MIN, |
VOL |
Output LOW Voltage |
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OL |
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VIN = VIL or VIH |
74 |
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0.35 |
0.5 |
V |
IOL = 8.0 mA |
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per Truth Table |
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IIH |
Input HIGH Current |
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20 |
μA |
VCC = MAX, VIN = 2.7 V |
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0.1 |
mA |
VCC = MAX, VIN = 7.0 V |
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IIL |
Input LOW Current |
MS, MR |
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± 0.4 |
mA |
VCC = MAX, VIN = 0.4 V |
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Clock |
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±1.6 |
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IOS |
Short Circuit Current (Note 1) |
± 20 |
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± 100 |
mA |
VCC = MAX |
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ICC |
Power Supply Current |
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26 |
mA |
VCC = MAX |
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Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC SET-UP REQUIREMENTS (TA = 25°C, VCC = 5.0 V)
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Limits |
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Symbol |
Parameter |
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Unit |
Test Conditions |
Min |
Typ |
Max |
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tW |
Any Pulse Width |
20 |
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ns |
VCC = 5.0 V |
ts |
MR or MS to Setup Time |
25 |
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ns |
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FAST AND LS TTL DATA
5-564
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