Motorola SN54LS155J, SN54LS156J, SN74LS156N, SN74LS155D, SN74LS155N Datasheet

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DUAL 1-OF-4 DECODER/

DEMULTIPLEXER

The SN54/74LS155 and SN54/74LS156 are high speed Dual 1-of-4 Decoder/Demultiplexers. These devices have two decoders with common 2-bit Address inputs and separate gated Enable inputs. Decoder ªaº has an Enable gate with one active HIGH and one active LOW input. Decoder ªbº has two active LOW Enable inputs. If the Enable functions are satisfied, one output of each decoder will be LOW as selected by the address inputs. The LS156 has open collector outputs for wired-OR (DOT-AND) decoding and function generator applications.

The LS155 and LS156 are fabricated with the Schottky barrier diode process for high speed and are completely compatible with all Motorola TTL families.

Schottky Process for High Speed

Multifunction Capability

Common Address Inputs

True or Complement Data Demultiplexing

Input Clamp Diodes Limit High Speed Termination Effects

ESD > 3500 Volts

CONNECTION DIAGRAM DIP (TOP VIEW)

VCC

 

Eb

Eb

 

A0

 

O3b

 

O2b

 

O1b

 

O0b

 

16

 

15

 

14

 

13

 

12

 

11

 

10

 

9

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

NOTE:

The Flatpak version has the same pinouts

(Connection Diagram) as the Dual In-Line Package.

 

1

 

2

 

 

3

 

4

 

5

 

6

 

7

 

8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Ea

 

 

Ea

 

A1

 

O3a

 

O2a

O1a

 

O0a

GND

PIN NAMES

 

LOADING (Note a)

 

 

 

 

HIGH

LOW

 

 

 

 

 

 

A0, A1

Address Inputs

0.5

U.L.

0.25

U.L.

Ea, Eb

Enable (Active LOW) Inputs

0.5

U.L.

0.25

U.L.

Ea

 

 

Enable (Active HIGH) Input

0.5

U.L.

0.25

U.L.

O0 ± O3

Active LOW Outputs (Note b)

10

U.L.

5 (2.5)

U.L.

NOTES:

a)1 TTL Unit Load (U.L.) = 40 μA HIGH/1.6 mA LOW.

b)The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74) Temperature Ranges. The HIGH level drive for the LS156 must be established by an external resistor.

SN54/74LS155

SN54/74LS156

DUAL 1-OF-4 DECODER/

DEMULTIPLEXER

LS156-OPEN-COLLECTOR

LOW POWER SCHOTTKY

 

 

 

J SUFFIX

 

 

 

CERAMIC

 

 

 

CASE 620-09

16

1

 

 

 

 

 

 

 

 

N SUFFIX

 

 

 

PLASTIC

16

 

 

CASE 648-08

 

 

 

 

1

 

 

 

 

 

D SUFFIX

 

16

 

SOIC

 

 

CASE 751B-03

 

 

1

 

 

 

ORDERING INFORMATION

SN54LSXXXJ Ceramic

SN74LSXXXN Plastic

SN74LSXXXD SOIC

LOGIC SYMBOL

 

1

2

 

13 3

 

14 15

 

 

 

E

 

A0

A0

E

 

 

 

 

 

 

 

 

 

DECODER

a

A1

A1

DECODER b

 

 

 

 

 

 

 

0

1

2

 

3

0

1

2

3

7

6

5

 

4

9

10

11

12

 

 

 

 

VCC = PIN 16

 

 

 

 

 

 

GND =

PIN

8

 

 

FAST AND LS TTL DATA

5-262

Motorola SN54LS155J, SN54LS156J, SN74LS156N, SN74LS155D, SN74LS155N Datasheet

SN54/74LS155 SN54/74LS156

LOGIC DIAGRAM

 

Ea Ea

 

A0 A1

 

EbEb

1

2

13

3

14

15

VCC = PIN 16

 

 

 

 

 

 

 

 

GND =

PIN

8

7

6

5

4

9

10

11

12

 

 

 

=

PIN

NUMBERS

O0a

O1a

O2a

O3a

O0b

O1b

O2b

O3b

 

 

 

FUNCTIONAL DESCRIPTION

The LS155 and LS156 are Dual 1-of-4 Decoder/Demultiplexers with common Address inputs and separate gated Enable inputs. When enabled, each decoder section accepts the binary weighted Address inputs (A0, A1) and provides four mutually exclusive active LOW outputs (O0 ±O3). If the Enable requirements of each decoder are not met, all outputs of that decoder are HIGH.

Each decoder section has a 2-input enable gate. The enable gate for Decoder ªaºrequires one active HIGH input and one active LOW input (EaEa). In demultiplexing applications, Decoder ªaº can accept either true or complemented data by using the Ea or Ea inputs respectively. The enable gate

for Decoder ªbº requires two active LOW inputs (EE ). The b b

LS155 or LS156 can be used as a 1-of-8 Decoder/Demultiplexer by tying Ea to Eb and relabeling the common connection as (A2). The other Eb and Ea are connected together to form the common enable.

The LS155 and LS156 can be used to generate all four minterms of two variables. These four minterms are useful in some applications replacing multiple gate functions as shown in Fig. a. The LS156 has the further advantage of being able to

AND the minterm functions by tying outputs together. Any number of terms can be wired-AND as shown below.

f = (E + A0 + A1) (E + A0 + A1) (E + A0 + A1) (E + A0 + A1)

where E = Ea + Ea; E = Eb + Eb

EE

A0

O0

A0

O0

A1

 

A1

 

E

 

E

 

A0

O1

A0

O1

A1

 

A1

 

E

 

E

 

A0

O2

A0

O2

A1

 

A1

 

E

 

E

 

A0

O3

A0

O3

A1

 

A1

 

Figure a

TRUTH TABLE

ADDRESS

ENABLE ªaº

 

OUTPUT ªaº

 

ENABLE ªbº

 

OUTPUT ªbº

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A0

A1

Ea

Ea

O0

O1

O2

O3

Eb

Eb

O0

O1

O2

O3

X

X

L

X

H

H

H

H

H

X

H

H

H

H

X

X

X

H

H

H

H

H

X

H

H

H

H

H

L

L

H

L

L

H

H

H

L

L

L

H

H

H

H

L

H

L

H

L

H

H

L

L

H

L

H

H

L

H

H

L

H

H

L

H

L

L

H

H

L

H

H

H

H

L

H

H

H

L

L

L

H

H

H

L

 

 

 

 

 

 

 

 

 

 

 

 

 

 

H = HIGH Voltage Level

L = LOW Voltage Level

X = Don't Care

FAST AND LS TTL DATA

5-263

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