DUAL 1-OF-4 DECODER/
DEMULTIPLEXER
The SN54/74LS155 and SN54/74LS156 are high speed Dual 1-of-4 Decoder/Demultiplexers. These devices have two decoders with common 2-bit Address inputs and separate gated Enable inputs. Decoder ªaº has an Enable gate with one active HIGH and one active LOW input. Decoder ªbº has two active LOW Enable inputs. If the Enable functions are satisfied, one output of each decoder will be LOW as selected by the address inputs. The LS156 has open collector outputs for wired-OR (DOT-AND) decoding and function generator applications.
The LS155 and LS156 are fabricated with the Schottky barrier diode process for high speed and are completely compatible with all Motorola TTL families.
•Schottky Process for High Speed
•Multifunction Capability
•Common Address Inputs
•True or Complement Data Demultiplexing
•Input Clamp Diodes Limit High Speed Termination Effects
•ESD > 3500 Volts
CONNECTION DIAGRAM DIP (TOP VIEW)
VCC |
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Eb |
Eb |
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A0 |
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O3b |
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O2b |
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O1b |
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O0b |
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16 |
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15 |
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14 |
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13 |
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12 |
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11 |
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10 |
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9 |
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NOTE:
The Flatpak version has the same pinouts
(Connection Diagram) as the Dual In-Line Package.
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2 |
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3 |
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4 |
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5 |
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6 |
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7 |
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8 |
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Ea |
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Ea |
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A1 |
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O3a |
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O2a |
O1a |
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O0a |
GND |
PIN NAMES |
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LOADING (Note a) |
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HIGH |
LOW |
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A0, A1 |
Address Inputs |
0.5 |
U.L. |
0.25 |
U.L. |
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Ea, Eb |
Enable (Active LOW) Inputs |
0.5 |
U.L. |
0.25 |
U.L. |
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Ea |
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Enable (Active HIGH) Input |
0.5 |
U.L. |
0.25 |
U.L. |
O0 ± O3 |
Active LOW Outputs (Note b) |
10 |
U.L. |
5 (2.5) |
U.L. |
NOTES:
a)1 TTL Unit Load (U.L.) = 40 μA HIGH/1.6 mA LOW.
b)The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74) Temperature Ranges. The HIGH level drive for the LS156 must be established by an external resistor.
SN54/74LS155
SN54/74LS156
DUAL 1-OF-4 DECODER/
DEMULTIPLEXER
LS156-OPEN-COLLECTOR
LOW POWER SCHOTTKY
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J SUFFIX |
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CERAMIC |
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CASE 620-09 |
16 |
1 |
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N SUFFIX |
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PLASTIC |
16 |
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CASE 648-08 |
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1 |
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D SUFFIX |
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16 |
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SOIC |
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CASE 751B-03 |
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1 |
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ORDERING INFORMATION
SN54LSXXXJ Ceramic
SN74LSXXXN Plastic
SN74LSXXXD SOIC
LOGIC SYMBOL
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13 3 |
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14 15 |
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E |
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A0 |
A0 |
E |
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DECODER |
a |
A1 |
A1 |
DECODER b |
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0 |
1 |
2 |
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3 |
0 |
1 |
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3 |
7 |
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4 |
9 |
10 |
11 |
12 |
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VCC = PIN 16 |
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GND = |
PIN |
8 |
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FAST AND LS TTL DATA
5-262
SN54/74LS155 •SN54/74LS156
LOGIC DIAGRAM
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Ea Ea |
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A0 A1 |
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EbEb |
1 |
2 |
13 |
3 |
14 |
15 |
VCC = PIN 16 |
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GND = |
PIN |
8 |
7 |
6 |
5 |
4 |
9 |
10 |
11 |
12 |
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PIN |
NUMBERS |
O0a |
O1a |
O2a |
O3a |
O0b |
O1b |
O2b |
O3b |
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FUNCTIONAL DESCRIPTION
The LS155 and LS156 are Dual 1-of-4 Decoder/Demultiplexers with common Address inputs and separate gated Enable inputs. When enabled, each decoder section accepts the binary weighted Address inputs (A0, A1) and provides four mutually exclusive active LOW outputs (O0 ±O3). If the Enable requirements of each decoder are not met, all outputs of that decoder are HIGH.
Each decoder section has a 2-input enable gate. The enable gate for Decoder ªaºrequires one active HIGH input and one active LOW input (Ea•Ea). In demultiplexing applications, Decoder ªaº can accept either true or complemented data by using the Ea or Ea inputs respectively. The enable gate
for Decoder ªbº requires two active LOW inputs (E•E ). The b b
LS155 or LS156 can be used as a 1-of-8 Decoder/Demultiplexer by tying Ea to Eb and relabeling the common connection as (A2). The other Eb and Ea are connected together to form the common enable.
The LS155 and LS156 can be used to generate all four minterms of two variables. These four minterms are useful in some applications replacing multiple gate functions as shown in Fig. a. The LS156 has the further advantage of being able to
AND the minterm functions by tying outputs together. Any number of terms can be wired-AND as shown below.
f = (E + A0 + A1) (E + A0 + A1) (E + A0 + A1) (E + A0 + A1)
where E = Ea + Ea; E = Eb + Eb
EE
A0 |
O0 |
A0 |
O0 |
A1 |
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A1 |
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E |
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E |
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A0 |
O1 |
A0 |
O1 |
A1 |
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A1 |
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E |
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E |
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A0 |
O2 |
A0 |
O2 |
A1 |
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A1 |
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E |
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E |
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A0 |
O3 |
A0 |
O3 |
A1 |
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A1 |
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Figure a
TRUTH TABLE
ADDRESS |
ENABLE ªaº |
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OUTPUT ªaº |
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ENABLE ªbº |
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OUTPUT ªbº |
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A0 |
A1 |
Ea |
Ea |
O0 |
O1 |
O2 |
O3 |
Eb |
Eb |
O0 |
O1 |
O2 |
O3 |
X |
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L |
X |
H |
H |
H |
H |
H |
X |
H |
H |
H |
H |
X |
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H |
H |
H |
H |
H |
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H |
H |
H |
H |
H |
L |
L |
H |
L |
L |
H |
H |
H |
L |
L |
L |
H |
H |
H |
H |
L |
H |
L |
H |
L |
H |
H |
L |
L |
H |
L |
H |
H |
L |
H |
H |
L |
H |
H |
L |
H |
L |
L |
H |
H |
L |
H |
H |
H |
H |
L |
H |
H |
H |
L |
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L |
H |
H |
H |
L |
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H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
FAST AND LS TTL DATA
5-263