MOTOROLA SN74LS157M, SN74LS157MEL, SN74LS157ML1, SN74LS157ML2, SN74LS157MR1 Datasheet

SN74LS157

Quad 2-Input Multiplexer

The LSTTL / MSI SN74LS157 is a high speed Quad 2-Input Multiplexer. Four bits of data from two sources can be selected using the common Select and Enable inputs. The four buffered outputs present the selected data in the true (non-inverted) form. The LS157 can also be used to generate any four of the 16 different functions of two variables. The LS157 is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all ON Semiconductor TTL families.

•Schottky Process for High Speed

•Multifunction Capability

•Non-Inverting Outputs

•Input Clamp Diodes Limit High Speed Termination Effects

•Special Circuitry Ensures Glitch Free Multiplexing

•ESD > 3500 Volts

GUARANTEED OPERATING RANGES

Symbol	Parameter	Min	Typ	Max	Unit
VCC	Supply Voltage	4.75	5.0	5.25	V
TA	Operating Ambient	0	25	70	°C
	Temperature Range
IOH	Output Current ± High			± 0.4	mA
IOL	Output Current ± Low			8.0	mA

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LOW

POWER

SCHOTTKY

16

1

PLASTIC

N SUFFIX

CASE 648

16

1

SOIC

D SUFFIX

CASE 751B

ORDERING INFORMATION

Device	Package	Shipping
SN74LS157N	16 Pin DIP	2000 Units/Box
SN74LS157D	16 Pin	2500/Tape & Reel

Semiconductor Components Industries, LLC, 1999	1	Publication Order Number:
December, 1999 ± Rev. 6		SN74LS157/D

SN74LS157

CONNECTION DIAGRAM DIP (TOP VIEW)

VCC

E

I0c

I1c

Zc

I0d

I1d

Zd

16

15

14

13

12

11

10

9

NOTE:

The Flatpak version has the same

pinouts (Connection Diagram) as

the Dual In-Line Package.

1

2

3

4

5

6

7

8

S

I0a

I1d

Za

I0b

I1b

Zb GND

LOADING (Note a)

PIN NAMES

HIGH

LOW

S

Common Select Input

1.0 U.L.

0.5 U.L.

Enable (Active LOW) Input

1.0 U.L.

0.5 U.L.

E

I0a ± I0d

Data Inputs from Source 0

0.5 U.L.

0.25 U.L.

I1a ± I1d

Data Inputs from Source 1

0.5 U.L.

0.25 U.L.

Za ± Zd

Multiplexer Outputs

10 U.L.

5 U.L.

NOTES:

a) 1 TTL Unit Load (U.L.) = 40 mA HIGH/1.6 mA LOW.

LOGIC SYMBOL

15 2 3 5 6 14 13 11 10

E I0a I1a I0b I1b I0c I1c I0d I1d

1 S

Za		Zb		Zc		Zd
4		7		12		9
		VCC = PIN 16
		GND = PIN 8

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				SN74LS157
			LOGIC DIAGRAM
I0a	I1a	I0b	I1b	I0c	I1c	I0d		I1d	E S
2	3	5	6	14	13	11	10	15	1

				VCC = PIN 16
				GND = PIN 8
4	7	12	9	= PIN NUMBERS
Za	Zb	Zc		Zd

FUNCTIONAL DESCRIPTION

The LS157 is a Quad 2-Input Multiplexer fabricated with the Schottky barrier diode process for high speed. It selects four bits of data from two sources under the control of a common Select Input (S). The Enable Input (E) is active LOW. When E is HIGH, all of the outputs (Z) are forced LOW regardless of all other inputs.

The LS157 is the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select Input. The logic equations for the outputs are:

Za =

(I1a S + I0a

Zb =

(I1b S + I0b

E

S)

E

S)

Zc =

(I1c S + I0c

Zd =

(I1d S + I0d

E

S)

E

S)

A common use of the LS157 is the moving of data from two groups of registers to four common output busses. The particular register from which the data comes is determined by the state of the Select Input. A less obvious use is as a function generator. The LS157 can generate any four of the 16 different functions of two variables with one variable common. This is useful for implementing highly irregular logic.

TRUTH TABLE

			SELECT
ENABLE			INPUT		INPUTS	OUTPUT
			S	I0	I1	Z
	E
H			X	X	X	L
	L		H	X	L	L
	L		H	X	H	H
	L		L	L	X	L
	L		L	H	X	H

H = HIGH Voltage Level

L = LOW Voltage Level

X = Don't Care

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