Motorola SN54LS147J, SN54LS148J, SN54LS748J, SN74LS147D, SN74LS147N Datasheet
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10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS
The SN54/74LS147 and the SN54/74LS148 are Priority Encoders. They provide priority decoding of the inputs to ensure that only the highest order data line is encoded. Both devices have data inputs and outputs which are active at the low logic level.
The LS147 encodes nine data lines to four-line (8-4-2-1) BCD. The implied decimal zero condition does not require an input condition because zero is encoded when all nine data lines are at a high logic level.
The LS148 encodes eight data lines to three-line (4-2-1) binary (octal). By providing cascading circuitry (Enable Input EI and Enable Output EO) octal expansion is allowed without needing external circuitry.
The SN54 /74LS748 is a proprietary Motorola part incorporating a built-in deglitcher network which minimizes glitches on the GS output. The glitch occurs on the negative going transition of the EI input when data inputs 0±7 are at logical ones.
The only dc parameter differences between the LS148 and the LS748 are that (1) Pin 10 (input 0) has a fan-in of 2 on the LS748 versus a fan-in of 1 on the LS148; (2) Pins 1, 2, 3, 4, 11, 12 and 13 (inputs 1, 2, 3, 4, 5, 6, 7) have a fan-in of 3 on the LS748 versus a fan-in of 2 on the LS148.
The only ac difference is that tPHL from EI to EO is changed from 40 to 45 ns.
SN54 / 74LS147
(TOP VIEW)
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OUTPUT |
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INPUTS |
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OUTPUT |
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VCC |
NC |
D |
3 |
2 |
1 |
9 |
A |
16 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
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D |
3 |
2 |
1 |
9 |
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4 |
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A |
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5 |
6 |
7 |
8 |
C |
B |
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1 |
2 |
3 |
4 |
5 |
6 |
7 |
8 |
4 |
5 |
6 |
7 |
8 |
C |
B |
GND |
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INPUTS |
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OUTPUTS |
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SN54 / 74LS148 |
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SN54 / 74LS748 |
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(TOP VIEW) |
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OUTPUTS |
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INPUTS |
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OUTPUT |
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VCC |
EO |
GS |
3 |
2 |
1 |
0 |
A0 |
16 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
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EO |
GS |
3 |
2 |
1 |
0 |
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4 |
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A0 |
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5 |
6 |
7 |
EI |
A2 |
A1 |
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1 |
2 |
3 |
4 |
5 |
6 |
7 |
8 |
4 |
5 |
6 |
7 |
E1 |
A2 |
A1 |
GND |
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INPUTS |
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OUTPUTS |
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SN54/74LS147
SN54/74LS148
SN54/74LS748
10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS
LOW POWER SCHOTTKY
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J SUFFIX |
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CERAMIC |
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CASE 620-09 |
16 |
1 |
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N SUFFIX |
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PLASTIC |
16 |
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CASE 648-08 |
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1 |
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D SUFFIX |
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16 |
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SOIC |
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CASE 751B-03 |
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1 |
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ORDERING INFORMATION
SN54LSXXXJ Ceramic
SN74LSXXXN Plastic
SN74LSXXXD SOIC
FAST AND LS TTL DATA
5-245
SN54/74LS147 •SN54/74LS148 •SN54/74LS748
SN54 / 74LS147
FUNCTION TABLE
INPUTS |
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OUTPUTS |
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1 2 3 4 5 6 7 8 9 |
D C B A |
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H H H H H H H H H |
H |
H H H |
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X X X X X X X X L |
L H H L |
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X X X X X X X L |
H |
L H H H |
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X X X X X X L |
H H |
H L L L |
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X X X X X L |
H H H |
H L L H |
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X X X X L H H H H |
H L H L |
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X X X L H H H H H |
H L H H |
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X X L H H H H H H |
H H L L |
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X L H H H H H H H |
H H L H |
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L H H H H H H H H |
H H H L |
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H = HIGH Logic Level, L = LOW Logic Level, X = Irrelevant
SN54 / 74LS148
SN54 / 74LS748
FUNCTION TABLE
INPUTS |
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OUTPUTS |
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EI 0 1 2 3 4 5 |
6 |
7 |
A2 A1 A0 |
GS |
EO |
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H X X X X X X X X |
H H H |
H H |
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L H H H H H H H H |
H H H |
H L |
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L X X X X X X X L |
L L L |
L |
H |
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L X X X X X X L |
H |
L L H |
L |
H |
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L X X X X X L |
H H |
L H L |
L |
H |
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L X X X X L H H H |
L H H |
L |
H |
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L X X X L H H H H |
H L L |
L |
H |
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L X X L H H H H H |
H L H |
L |
H |
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L X L H H H H H H |
H H L |
L |
H |
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L L H H H H H H H |
H H H |
L |
H |
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FUNCTIONAL BLOCK DIAGRAMS
1 |
(11) |
2 |
(12) |
3 |
(13) |
4 |
(1) |
5 |
(2) |
6 |
(3) |
7 |
(4) |
8 |
(5) |
9 |
(10) |
(9) |
A |
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(7) |
B |
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(6)
C
(14) D
SN54 / 74LS147
0 |
(10) |
(15) |
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EO |
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1 |
(11) |
(14) |
GS |
2 |
(12) |
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(8) |
A0 |
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(13) |
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3 |
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4 |
(1) |
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(2) |
(7) |
A1 |
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5 |
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6 |
(3) |
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(4) |
(6) |
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7 |
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A2 |
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(5) |
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EI |
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SN54 / 74LS148 |
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FAST AND LS TTL DATA
5-246
SN54/74LS147 •SN54/74LS148 •SN54/74LS748
FUNCTIONAL BLOCK DIAGRAMS (continued)
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G31 |
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0(10) |
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G13 |
(15) |
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EO |
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1(11) |
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(14) |
GS |
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G2 |
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G29 |
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2(12) |
G9 |
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G3 |
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(9) |
A0 |
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(13) |
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G18 |
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3 |
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G4 |
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4 (1) |
G10 |
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G5 |
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(7) |
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5 (2) |
G11 |
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A1 |
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G23 |
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G6 |
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6 (3) |
G12 |
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G7 |
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7 |
(4) |
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(6) |
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A2 |
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G8 |
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G28 |
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EI(5) |
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G1 |
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SN54 / 74LS748 |
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FAST AND LS TTL DATA
5-247
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