Motorola SN54LS191J, SN54LS190J, SN74LS190D, SN74LS190N, SN74LS191D Datasheet
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PRESETTABLE BCD/DECADE UP/DOWN COUNTERS PRESETTABLE 4-BIT BINARY UP/DOWN COUNTERS
The SN54/74LS190 is a synchronous UP/DOWN BCD Decade (8421) Counter and the SN54/74LS191 is a synchronous UP/DOWN Modulo-16 Binary Counter. State changes of the counters are synchronous with the LOW-to-HIGH transition of the Clock Pulse input.
An asynchronous Parallel Load (PL) input overrides counting and loads the data present on the Pn inputs into the flip-flops, which makes it possible to use the circuits as programmable counters. A Count Enable (CE) input serves as the carry /borrow input in multi-stage counters. An Up/Down Count Control (U/D) input determines whether a circuit counts up or down. A Terminal Count (TC) output and a Ripple Clock (RC) output provide overflow/underflow indication and make possible a variety of methods for generating carry/borrow signals in multistage counter applications.
•Low Power . . . 90 mW Typical Dissipation
•High Speed . . . 25 MHz Typical Count Frequency
•Synchronous Counting
•Asynchronous Parallel Load
•Individual Preset Inputs
•Count Enable and Up/Down Control Inputs
•Cascadable
•Input Clamp Diodes Limit High Speed Termination Effects
CONNECTION DIAGRAM DIP (TOP VIEW)
VCC |
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P0 |
CP |
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RC |
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TC |
PL |
P2 |
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P3 |
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16 |
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14 |
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13 |
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12 |
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11 |
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10 |
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9 |
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NOTE: |
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The Flatpak version |
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has the same pinouts |
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(Connection Diagram) as |
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the Dual In-Line Package. |
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1 |
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P1 |
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Q1 |
Q0 |
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CE |
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U/D |
Q2 |
Q3 |
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GND |
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PIN NAMES |
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LOADING (Note a) |
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HIGH |
LOW |
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Count Enable (Active LOW) Input |
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CE |
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1.5 |
U.L. |
0.7 |
U.L. |
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CP |
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Clock Pulse (Active HIGH going edge) Input |
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0.5 U.L. |
0.25 |
U.L. |
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U / D |
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Up/Down Count Control Input |
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0.5 |
U.L. |
0.25 |
U.L. |
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PL |
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Parallel Load Control (Active LOW) Input |
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0.5 U.L. |
0.25 |
U.L. |
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Pn |
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Parallel Data Inputs |
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0.5 |
U.L. |
0.25 |
U.L. |
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Qn |
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Flip-Flop Outputs (Note b) |
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10 |
U.L. |
5 (2.5) |
U.L. |
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RC |
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Ripple Clock Output (Note b) |
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10 |
U.L. |
5 (2.5) |
U.L. |
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TC |
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Terminal Count Output (Note b) |
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10 |
U.L. |
5 (2.5) |
U.L. |
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NOTES:
a.1 TTL Unit Load (U.L.) = 40 μA HIGH/1.6 mA LOW.
b.The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)
b.Temperature Ranges.
SN54/74LS190
SN54/74LS191
PRESETTABLE BCD/DECADE UP/DOWN COUNTERS
PRESETTABLE 4-BIT BINARY UP/DOWN COUNTERS
LOW POWER SCHOTTKY
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J SUFFIX |
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CERAMIC |
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CASE 620-09 |
16 |
1 |
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N SUFFIX |
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PLASTIC |
16 |
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CASE 648-08 |
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1 |
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D SUFFIX |
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16 |
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SOIC |
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CASE 751B-03 |
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1 |
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ORDERING INFORMATION
SN54LSXXXJ |
Ceramic |
SN74LSXXXN |
Plastic |
SN74LSXXXD |
SOIC |
LOGIC SYMBOL
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11 |
15 |
1 |
10 |
9 |
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PL |
P0 P1 P2 |
P3 |
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13 |
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5 |
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U/D |
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RC |
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4 |
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CE |
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TC |
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12 |
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14 |
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CP |
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Q0 Q1 Q2 Q3 |
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3 |
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VCC = PIN 16 |
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GND |
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PIN |
8 |
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FAST AND LS TTL DATA
5-341
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SN54/74LS190 •SN54/74LS191 |
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STATE DIAGRAMS |
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0 |
1 |
2 |
3 |
4 |
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0 |
1 |
2 |
3 |
4 |
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LS190 |
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UP: |
TC = 0Q Q3 |
(U/D) |
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15 |
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5 |
DOWN: |
TC = 0Q Q1 |
Q2 |
Q3 (U/D) |
15 |
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5 |
14 |
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6 |
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LS191 |
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14 |
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6 |
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UP: |
TC |
= 0Q |
Q1 |
Q2 |
Q3 |
(U/D) |
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DOWN: |
TC |
= 0Q |
Q1 |
Q2 |
Q3 |
(U/D) |
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13 |
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7 |
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13 |
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7 |
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COUNT |
UP |
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12 |
11 |
10 |
9 |
8 |
COUNT |
DOWN |
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12 |
11 |
10 |
9 |
8 |
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LS190 |
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LS191 |
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LOGIC DIAGRAMS
CP |
U/D |
P0 |
CE |
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P1 |
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P2 |
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P3 |
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PL |
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14 |
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5 |
15 |
4 |
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1 |
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10 |
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9 |
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11 |
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J |
CLOCK |
K |
J |
CLOCK |
K |
J |
CLOCK |
K |
J |
CLOCK |
K |
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PRESET CLEAR |
PRESET CLEAR |
PRESET CLEAR |
PRESET CLEAR |
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Q |
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Q |
Q |
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Q |
Q |
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Q |
Q |
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Q |
13 |
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12 |
3 |
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2 |
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6 |
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7 |
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RC |
TC |
Q0 |
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Q1 |
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Q2 |
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Q3 |
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VCC = PIN 16 |
DECADE COUNTER |
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LS190 |
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GND = |
PIN |
8 |
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= |
PIN |
NUMBERS |
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FAST AND LS TTL DATA
5-342
SN54/74LS190 •SN54/74LS191
LOGIC DIAGRAMS (continued)
CP |
U/D |
P0 |
CE |
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P1 |
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P2 |
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P3 |
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PL |
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14 |
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5 |
15 |
4 |
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1 |
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10 |
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9 |
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11 |
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J |
CLOCK |
K |
J |
CLOCK |
K |
J |
CLOCK |
K |
J |
CLOCK |
K |
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PRESET CLEAR |
PRESET CLEAR |
PRESET CLEAR |
PRESET CLEAR |
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Q |
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Q |
Q |
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Q |
Q |
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Q |
Q |
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Q |
13 |
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12 |
3 |
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2 |
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6 |
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7 |
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RC |
TC |
Q0 |
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Q1 |
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Q2 |
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Q3 |
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VCC = PIN 16
GND = PIN 8
= PIN NUMBERS
BINARY COUNTER
LS191
FAST AND LS TTL DATA
5-343
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