Motorola SN54LS164J, SN74LS164N, SN74LS164D Datasheet

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SERIAL-IN PARALLEL-OUT SHIFT REGISTER

The SN54/74LS164 is a high speed 8-Bit Serial-In Parallel-Out Shift Register. Serial data is entered through a 2-Input AND gate synchronous with the LOW to HIGH transition of the clock. The device features an asynchronous Master Reset which clears the register setting all outputs LOW independent of the clock. It utilizes the Schottky diode clamped process to achieve high speeds and is fully compatible with all Motorola TTL products.

Typical Shift Frequency of 35 MHz

Asynchronous Master Reset

Gated Serial Data Input

Fully Synchronous Data Transfers

Input Clamp Diodes Limit High Speed Termination Effects

ESD > 3500 Volts

CONNECTION DIAGRAM DIP (TOP VIEW)

 

VCC

 

Q7

 

Q6

 

Q5

 

Q4

 

MR CP

 

14

 

13

 

12

 

11

 

10

 

9

 

8

 

NOTE:

The Flatpak version has the same pinouts

(Connection Diagram) as the Dual In-Line Package.

 

1

 

2

 

3

 

4

 

5

 

6

 

7

 

 

A

 

B

 

Q0

 

Q1

 

Q2

Q3

 

GND

 

PIN NAMES

 

LOADING (Note a)

 

 

HIGH

LOW

 

 

 

 

 

A, B

Data Inputs

0.5 U.L.

0.25

U.L.

CP

Clock (Active HIGH Going Edge) Input

0.5 U.L.

0.25

U.L.

MR

Master Reset (Active LOW) Input

0.5 U.L.

0.25

U.L.

Q0 ± Q7

Outputs (Note b)

10 U.L.

5 (2.5)

U.L.

NOTES:

a)1 TTL Unit Load (U.L.) = 40 μA HIGH/1.6 mA LOW.

b)The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74) Temperature Ranges.

SN54/74LS164

SERIAL-IN PARALLEL-OUT

SHIFT REGISTER

LOW POWER SCHOTTKY

 

 

 

J SUFFIX

 

 

 

CERAMIC

 

 

 

CASE 632-08

14

1

 

 

 

 

 

 

 

 

N SUFFIX

 

 

 

PLASTIC

14

 

 

CASE 646-06

 

 

 

 

1

 

 

 

 

 

D SUFFIX

 

14

 

SOIC

 

 

CASE 751A-02

 

 

1

 

 

 

ORDERING INFORMATION

SN54LSXXXJ Ceramic

SN74LSXXXN Plastic

SN74LSXXXD SOIC

LOGIC SYMBOL

1

 

A

 

 

 

LS164

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2

 

B

8-BIT SHIFT REGISTER

 

 

 

 

 

 

 

 

 

8

 

CP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

9

3

4

5

6

10

11

12

13

 

 

 

 

 

 

VCC = PIN 14

 

 

 

 

 

 

 

 

 

 

 

 

GND = PIN 7

 

 

 

 

 

 

FAST AND LS TTL DATA

5-1

Motorola SN54LS164J, SN74LS164N, SN74LS164D Datasheet

SN54/74LS164

LOGIC DIAGRAM

1

A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

D

Q

D

Q

D

Q

D

Q

D

Q

D

Q

D

Q

D

Q

2

B

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CD

 

CD

 

CD

 

CD

 

CD

 

CD

 

CD

 

CD

8

CP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

9

MR

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC = PIN 14

Q0

 

Q1

 

Q2

 

 

Q3

 

Q4

Q5

 

Q6

 

Q7

 

3

 

4

 

5

 

 

6

 

10

11

 

12

 

13

GND = PIN 7

= PIN NUMBERS

FUNCTIONAL DESCRIPTION

The LS164 is an edge-triggered 8-bit shift register with serial data entry and an output from each of the eight stages. Data is entered serially through one of two inputs (A or B); either of these inputs can be used as an active HIGH Enable for data entry through the other input. An unused input must be tied HIGH, or both inputs connected together.

Each LOW-to-HIGH transition on the Clock (CP) input shifts data one place to the right and enters into Q0 the logical AND of the two data inputs (AB) that existed before the rising clock edge. A LOW level on the Master Reset (MR) input overrides all other inputs and clears the register asynchronously, forcing all Q outputs LOW.

MODE SELECT Ð TRUTH TABLE

OPERATING

 

 

INPUTS

 

OUTPUTS

MODE

 

 

 

 

 

 

 

MR

A

B

Q0

Q1±Q7

 

 

Reset (Clear)

 

L

X

X

L

L ± L

 

 

 

 

 

 

 

 

 

H

I

I

L

q0 ± q6

Shift

 

H

I

h

L

q0 ± q6

 

 

H

h

I

L

q0 ± q6

 

 

H

h

h

H

q0 ± q6

L (l) = LOW Voltage Levels

H (h) = HIGH Voltage Levels X = Don't Care

qn = Lower case letters indicate the state of the referenced input or output one qn = set-up time prior to the LOW to HIGH clock transition.

GUARANTEED OPERATING RANGES

Symbol

Parameter

 

Min

Typ

Max

Unit

 

 

 

 

 

 

 

VCC

Supply Voltage

54

4.5

5.0

5.5

V

 

 

74

4.75

5.0

5.25

 

 

 

 

 

 

 

 

TA

Operating Ambient Temperature Range

54

± 55

25

125

°C

 

 

74

0

25

70

 

 

 

 

 

 

 

 

IOH

Output Current Ð High

54, 74

 

 

± 0.4

mA

IOL

Output Current Ð Low

54

 

 

4.0

mA

 

 

74

 

 

8.0

 

 

 

 

 

 

 

 

FAST AND LS TTL DATA

5-2

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