MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document by MCM6343/D
Product Preview
256K x 16 Bit 3.3 V Asynchronous
Fast Static RAM
The MCM6343 is a 4,194,304±bit static random access memory organized as 262,144 words of 16 bits. Static design eliminates the need for external clocks or timing strobes.
The MCM6343 is equipped with chip enable (E), write enable (W), and output enable (G) pins, allowing for greater system flexibility and eliminating bus contention problems. Separate byte enable controls (LB and UB) allow individual bytes to be written and read. LB controls the lower bits DQ0 to DQ7, while UB controls the upper bits DQ8 to DQ15.
The MCM6343 is available in a 400 mil, 44±lead small±outline SOJ package and a 44±lead TSOP Type II package.
•Single 3.3 V ± 0.3 V Power Supply
•Fast Access Time: 12/15 ns
•Equal Address and Chip Enable Access Time
•All Inputs and Outputs are TTL Compatible
•Data Byte Control
•Fully Static Operation
•Power Operation: 250/240/230 mA Maximum, Active AC
•Commercial and Standard Industrial Temperature Option: ± 40 to + 85°C
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BLOCK DIAGRAM |
G OUTPUT |
HIGH BYTE OUTPUT ENABLE |
ENABLE |
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BUFFER |
LOW BYTE OUTPUT ENABLE |
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9 |
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8 |
HIGH |
8 |
A |
ADDRESS |
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BYTE |
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18 |
BUFFERS |
9 |
ROW |
COLUMN |
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OUTPUT |
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DECODER |
DECODER |
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BUFFER |
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8 |
HIGH |
8 |
E |
CHIP |
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BYTE |
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WRITE |
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ENABLE |
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DRIVER |
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BUFFER |
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SENSE |
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256K x 16 |
16 |
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AMPS |
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BIT |
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WRITE |
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LOW |
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W |
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MEMORY |
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8 |
8 |
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ENABLE |
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ARRAY |
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BYTE |
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BUFFER |
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OUTPUT |
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BUFFER |
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8 |
LOW |
8 |
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BYTE |
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LB |
BYTE |
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WRITE |
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DRIVER |
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UB |
ENABLE |
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HIGH BYTE WRITE ENABLE |
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BUFFER |
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LOW BYTE WRITE ENABLE
MCM6343
YJ PACKAGE 400 MIL SOJ CASE 919±01
TS PACKAGE
TSOP TYPE II
CASE 924A±02
PIN ASSIGNMENT
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A |
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1 |
44 |
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A |
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A |
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2 |
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3 |
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A |
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4 |
41 |
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G |
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A |
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5 |
40 |
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UB |
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E |
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6 |
39 |
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LB |
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DQ0 |
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7 |
38 |
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DQ15 |
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DQ1 |
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8 |
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DQ14 |
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DQ2 |
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9 |
36 |
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DQ13 |
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DQ3 |
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10 |
35 |
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DQ12 |
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VDD |
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11 |
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VSS |
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VSS |
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12 |
33 |
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VDD |
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DQ4 |
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13 |
32 |
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DQ11 |
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DQ5 |
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14 |
31 |
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DQ10 |
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DQ6 |
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15 |
30 |
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DQ9 |
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DQ7 |
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16 |
29 |
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DQ8 |
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W |
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17 |
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NC |
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A |
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18 |
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19 |
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PIN NAMES
A0 ± A17 . . . . . . . . . . . . . . . . . Address Input
E . . . . . . . . . . . . . . . . . . . . . . . . . Chip Enable
W . . . . . . . . . . . . . . . . . . . . . . . Write Enable
G . . . . . . . . . . . . . . . . . . . . . . Output Enable
UB . . . . . . . . . . . . . . . . . . . . . . . . Upper Byte
LB . . . . . . . . . . . . . . . . . . . . . . . . . Lower Byte
DQ0 ± DQ15 . . . . . . . . . . Data Input/Output
VDD . . . . . . . . . . . . . . + 3.3 V Power Supply
VSS . . . . . . . . . . . . . . . . . . . . . . . . . . Ground
NC . . . . . . . . . . . . . . . . . . . . . No Connection
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
REV 2 2/10/98
Motorola, Inc. 1998 |
MCM6343 |
MOTOROLA FAST SRAM |
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1 |
TRUTH TABLE (X = Don't Care)
E |
G |
W |
LB |
UB |
Mode |
VDD Current |
DQ0 ± DQ7 |
DQ8 ± DQ15 |
H |
X |
X |
X |
X |
Not Selected |
ISB1, ISB2 |
High±Z |
High±Z |
L |
H |
H |
X |
X |
Output Disabled |
IDDA |
High±Z |
High±Z |
L |
X |
X |
H |
H |
Output Disabled |
IDDA |
High±Z |
High±Z |
L |
L |
H |
L |
H |
Low Byte Read |
IDDA |
Dout |
High±Z |
L |
L |
H |
H |
L |
High Byte Read |
IDDA |
High±Z |
Dout |
L |
L |
H |
L |
L |
Word Read |
IDDA |
Dout |
Dout |
L |
X |
L |
L |
H |
Low Byte Write |
IDDA |
Din |
High±Z |
L |
X |
L |
H |
L |
High Byte Write |
IDDA |
High±Z |
Din |
L |
X |
L |
L |
L |
Word Write |
IDDA |
Din |
Din |
ABSOLUTE MAXIMUM RATINGS (See Notes)
Rating |
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Symbol |
Value |
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Unit |
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Supply Voltage |
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VDD |
± 0.5 to + |
4.6 |
V |
Voltage on Any Pin |
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Vin |
± 0.5 to VDD + 0.5 |
V |
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Output Current per Pin |
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Iout |
± 20 |
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mA |
Package Power Dissipation |
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PD |
TBD |
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W |
Temperature Under Bias |
Commercial |
Tbias |
± 10 to + |
85 |
°C |
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Industrial |
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± 45 to + |
90 |
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Operating Temperature |
Commercial |
TA |
0 to + 70 |
°C |
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Industrial |
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± 45 to + |
85 |
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Storage Temperature |
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Tstg |
± 55 to + 150 |
°C |
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NOTES: |
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1.Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to RECOMMENDED OPERATING CONDITIONS. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
2.All voltages are referenced to VSS.
3.Power dissipation capability will be dependent upon package characteristics and use environment.
This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to these high±impedance circuits.
This CMOS memory circuit has been designed to meet the dc and ac specifications shown in the tables, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow of at least 500 linear feet per minute is maintained.
MCM6343 |
MOTOROLA FAST SRAM |
2 |
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DC OPERATING CONDITIONS AND CHARACTERISTICS
(VDD = 3.3 V ± 0.3 V, TA = 0 to 70°C, Unless Otherwise Noted) (TA = ± 40 to + 85°C for Industrial Temperature Offering)
RECOMMENDED OPERATING CONDITIONS
Parameter |
Symbol |
Min |
Typ |
Max |
Unit |
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Power Supply Voltage |
VDD |
3.0 |
3.3 |
3.6 |
V |
Input High Voltage |
VIH |
2.2 |
Ð |
VDD + 0.3** |
V |
Input Low Voltage |
VIL |
± 0.5* |
Ð |
0.8 |
V |
*VIL (min) = ± 0.5 V dc; VIL (min) = ± 2.0 V ac (pulse width ≤ 20 ns) for I ≤ 20.0 mA.
**VIH (max) = VDD + 0.3 V dc; VIH (max) = VDD + 2.0 V ac (pulse width ≤ 20 ns) for I ≤ 20.0 mA.
DC CHARACTERISTICS
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Parameter |
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Symbol |
Min |
Max |
Unit |
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Input Leakage Current (All Inputs, Vin = 0 to VDD) |
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Ilkg(I) |
Ð |
± 1.0 |
μA |
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Output Leakage Current (E = VIH, Vout = 0 to VDD) |
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Ilkg(O) |
Ð |
± 1.0 |
μA |
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Output Low Voltage |
(IOL = + 4.0 mA) |
VOL |
Ð |
0.4 |
V |
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(IOL = + 100 μA) |
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VSS + 0.2 |
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Output High Voltage |
(IOH = ± 4.0 mA) |
VOH |
2.4 |
Ð |
V |
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(IOH = ± 100 μA) |
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VDD ± 0.2 |
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POWER SUPPLY CURRENTS
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± 40 to |
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Parameter |
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Symbol |
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0 to 70°C |
+ 85°C |
Unit |
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AC Active Supply Current |
MCM6343±12: tAVAV = 12 ns |
ICC |
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240 |
240 |
mA |
(Iout = 0 mA, VCC = max) |
MCM6343±15: tAVAV = 15 ns |
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230 |
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AC Standby Current (VCC = max, E = VIH, |
MCM6343±12: tAVAV = 12 ns |
ISB1 |
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50 |
55 |
mA |
No other restrictions on other inputs) |
MCM6343±15: tAVAV = 15 ns |
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45 |
50 |
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CMOS Standby Current (E ≥ VCC ± 0.2 V, Vin ≤ VSS + 0.2 V or ≥ VCC ± 0.2 V) |
ISB2 |
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5 |
5 |
mA |
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(VCC = max, f = 0 MHz) |
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CAPACITANCE (f = 1.0 MHz, dV = 3.0 V, TA = 25°C, Periodically Sampled Rather Than 100% Tested) |
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Parameter |
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Symbol |
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Typ |
Max |
Unit |
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Address Input Capacitance |
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Cin |
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Ð |
6 |
pF |
Control Input Capacitance |
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Cin |
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Ð |
6 |
pF |
Input/Output Capacitance |
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CI/O |
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Ð |
8 |
pF |
MOTOROLA FAST SRAM |
MCM6343 |
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3 |