MOTOROLA MC34151D, MC34151DR2, MC34151P, MC33151D, MC33151DR2 Datasheet

MC34151, MC33151

High Speed Dual

MOSFET Drivers

The MC34151/MC33151 are dual inverting high speed drivers specifically designed for applications that require low current digital circuitry to drive large capacitive loads with high slew rates. These devices feature low input current making them CMOS and LSTTL logic compatible, input hysteresis for fast output switching that is independent of input transition time, and two high current totem pole outputs ideally suited for driving power MOSFETs. Also included is an undervoltage lockout with hysteresis to prevent erratic system operation at low supply voltages.

Typical applications include switching power supplies, dc to dc converters, capacitor charge pump voltage doublers/inverters, and motor controllers.

These devices are available in dual±in±line and surface mount packages.

•Two Independent Channels with 1.5 A Totem Pole Output

•Output Rise and Fall Times of 15 ns with 1000 pF Load

•CMOS/LSTTL Compatible Inputs with Hysteresis

•Undervoltage Lockout with Hysteresis

•Low Standby Current

•Efficient High Frequency Operation

•Enhanced System Performance with Common Switching Regulator Control ICs

•Pin Out Equivalent to DS0026 and MMH0026

Representative Block Diagram

VCC	6
	+
+	±		+
+
+	5.7V
Logic Input A			Drive Output A
			7
2
			100k
			+
+			Drive Output B
Logic Input B
			5
4			100k
		Gnd	3

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				MARKING
				DIAGRAMS
				8
		PDIP±8		MC3x151P
		P SUFFIX		AWL
				YYWW
8		CASE 626
1				1
				8
		SO±8		3x151
8		D SUFFIX		ALYW
		CASE 751
1				1
x		= 3 or 4
A		= Assembly Location
WL, L = Wafer Lot
YY, Y		= Year
WW, W = Work Week
PIN CONNECTIONS
N.C.	1		8	N.C.
Logic Input A	2		7	Drive Output A
Gnd	3		6	VCC
Logic Input B	4		5	Drive Output B
		(Top View)
ORDERING INFORMATION
Device		Package		Shipping
MC34151D		SO±8		98 Units/Rail
MC34151DR2		SO±8	2500 Tape & Reel
MC34151P		PDIP±8		50 Units/Rail
MC33151D		SO±8		98 Units/Rail
MC33151DR2		SO±8	2500 Tape & Reel
MC33151P		PDIP±8		50 Units/Rail
MC33151VDR2		SO±8	2500 Units/Rail

Semiconductor Components Industries, LLC, 2000	1	Publication Order Number:
April, 2000 ± Rev. 1		MC34151/D

MC34151, MC33151

MAXIMUM RATINGS

Rating	Symbol	Value	Unit
Power Supply Voltage	VCC	20	V
Logic Inputs (Note 1.)	Vin	±0.3 to VCC	V
Drive Outputs (Note 2.)			A
Totem Pole Sink or Source Current	IO	1.5
Diode Clamp Current (Drive Output to VCC)	IO(clamp)	1.0
Power Dissipation and Thermal Characteristics
D Suffix SO±8 Package Case 751
Maximum Power Dissipation @ TA = 50°C	PD	0.56	W
Thermal Resistance, Junction±to±Air	RθJA	180	°C/W
P Suffix 8±Pin Package Case 626
Maximum Power Dissipation @ TA = 50°C	PD	1.0	W
Thermal Resistance, Junction±to±Air	RθJA	100	°C/W
Operating Junction Temperature	TJ	+150	°C
Operating Ambient Temperature	TA	0 to +70	°C
MC34151
MC33151		±40 to +85
Storage Temperature Range	Tstg	±65 to +150	°C

ELECTRICAL CHARACTERISTICS (VCC = 12 V, for typical values TA = 25°C, for min/max values TA is the only operating ambient temperature range that applies [Note 3.], unless otherwise noted.)

Characteristics	Symbol	Min	Typ	Max	Unit
LOGIC INPUTS
Input Threshold Voltage ± High State Logic 1	VIH	2.6	1.75	±	V
± Low State Logic 0	VIL	±	1.58	0.8
Input Current ± High State (VIH = 2.6 V)	IIH	±	200	500	μA
± Low State (VIL = 0.8 V)	IIL	±	20	100
DRIVE OUTPUT
Output Voltage ± Low State (ISink = 10 mA)	VOL	±	0.8	1.2	V
(ISink = 50 mA)		±	1.1	1.5
(ISink = 400 mA)	VOH	±	1.7	2.5
± High State (ISource = 10 mA)		10.5	11.2	±
(ISource = 50 mA)		10.4	11.1	±
(ISource = 400 mA)		9.5	10.9	±
Output Pull±Down Resistor	RPD	±	100	±	kΩ
SWITCHING CHARACTERISTICS (TA = 25°C)
Propagation Delay (10% Input to 10% Output, CL = 1.0 nF)					ns
Logic Input to Drive Output Rise	tPLH(in/out)	±	35	100
Logic Input to Drive Output Fall	tPHL(in/out)	±	36	100
Drive Output Rise Time (10% to 90%) CL = 1.0 nF	tr	±	14	30	ns
CL = 2.5 nF		±	31	±
Drive Output Fall Time (90% to 10%) CL = 1.0 nF	tf	±	16	30	ns
CL = 2.5 nF		±	32	±
TOTAL DEVICE
Power Supply Current	ICC				mA
Standby (Logic Inputs Grounded)		±	6.0	10
Operating (CL = 1.0 nF Drive Outputs 1 and 2, f = 100 kHz)		±	10.5	15
Operating Voltage	VCC	6.5	±	18	V

1.For optimum switching speed, the maximum input voltage should be limited to 10 V or VCC, whichever is less.

2.Maximum package power dissipation limits must be observed.

3. Tlow = 0°C for MC34151	Thigh = +70°C for MC34151
±40°C for MC33151	+85°C for MC33151

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2

MC34151, MC33151

	12
	4.7 V 0.1
	+
		6
	+	+
		±	+
	+
	+	5.7V		Drive Output
Logic Input	2			7
	50		100k	CL

+		5.0 V		90%
	Logic Input
	tr, tf	≤ 10 ns	10%
+		0 V
				tPLH
5			tPHL
4
100k				90%
	Drive Output			10%
3			tf	tr

Figure 1. Switching Characteristics Test Circuit

Figure 2. Switching Waveform Definitions

	2.4						(V)	2.2
		VCC = 12 V												VCC = 12 V
(mA)CURRENTINPUT							VOLTAGETHRESHOLD	2.0
	2.0	TA = 25°C
	1.6							1.8					Upper Threshold
	1.2							1.6					Low State Output
I	0.8						INPUT,	1.4		Lower Threshold
	0.4							1.2		High State Output
,
in
							th
							V
	0	2.0	4.0	6.0	8.0	10	12	1.0	±25	0	25	50	75	100	125
	0							±55
			Vin, INPUT VOLTAGE (V)							TA, AMBIENT TEMPERATURE (°C)

Figure 3. Logic Input Current versus

Figure 4. Logic Input Threshold Voltage

t PLH(IN/OUT) , DRIVE OUTPUT PROPAGATION DELAY (ns)

		Input Voltage
200	VCC = 12 V Overdrive Voltage is with Respect
160	CL = 1.0 nF	to the Logic Input Lower Threshold
	°
	TA = 25 C
120
80
40

0				Vth(lower)
±1.6		±1.2	±0.8	±0.4			0

Vin, INPUT OVERDRIVE VOLTAGE BELOW LOWER THRESHOLD (V)

versus Temperature

(ns)
DELAY	200	Overdrive Voltage is with Respect			VCC = 12 V
PROPAGATION
	160	to the Logic Input Lower Threshold			CL = 1.0 nF
					TA = 25°C
	120
OUTPUT	80
, DRIVE	40
PHL(IN/OUT)	0	Vth(upper)
	0	1.0	2.0	3.0	4.0
	V , INPUT OVERDRIVE VOLTAGE ABOVE UPPER THRESHOLD (V)
t		in

Figure 5. Drive Output Low±to±High Propagation	Figure 6. Drive Output High±to±Low Propagation
Delay versus Logic Overdrive Voltage	Delay versus Logic Input Overdrive Voltage

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3

MC34151, MC33151

90%

Logic Input

	10%	Drive Output
		50 ns/DIV

VCC = 12 V

Vin = 5 V to 0 V CL = 1.0 nF

TA = 25°C

Figure 7. Propagation Delay

(V)	3.0	High State Clamp
VOLTAGE	(Drive Output Driven Above VCC)					120 Hz Rate
	2.0					VCC = 12 V
						80 μs Pulsed Load
CLAMP	1.0					TA = 25°C
OUTPUT,	0		VCC
clamp	0					Low State Clamp
			Gnd		(Drive Output Driven Below Ground)
V
	±1.0	0.2	0.4	0.6	0.8	1.0	1.2	1.4
	0
			IO, OUTPUT LOAD CURRENT (A)

Figure 8. Drive Output Clamp Voltage

versus Clamp Current

VOLTAGE(V)	0			TA = 25°C
	VCC	Source Saturation VCC = 12 V
		(Load to Ground)		80	μ
	±1.0				s Pulsed Load
				120 Hz Rate
SATURATION	±2.0
	±3.0
OUTPUT,	3.0
	2.0
sat	1.0	Sink Saturation	Gnd
		(Load to VCC)
V	0

0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

IO, OUTPUT LOAD CURRENT (A)

Figure 9. Drive Output Saturation Voltage

versus Load Current

VOLTAGE(V)	0				Isource = 400 mA		VCC = 12 V
	±0.9	Source Saturation
	±0.5			VCC	Isource = 10 mA
	±0.7	(Load to Ground)
SATURATION
	1.7
	±1.1
OUTPUT,	1.9			Isink = 400 mA
	0.8
	1.5
	1.0			Isink = 10 mA
sat	0.6	Sink Saturation		Gnd
		(Load to VCC)
V
	0
		±25	0	25	50	75	100	125
	±55
		TA, AMBIENT TEMPERATURE (°C)

Figure 10. Drive Output Saturation Voltage

versus Temperature

90%

90%

	VCC = 12 V
	Vin = 5 V to 0 V
	CL = 1.0 nF
10%	TA = 25°C	10%

VCC = 12 V

Vin = 5 V to 0 V CL = 1.0 nF

TA = 25°C

10 ns/DIV	10 ns/DIV
Figure 11. Drive Output Rise Time	Figure 12. Drive Output Fall Time

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