Motorola MC34184D, MC34184DTB, MC34184P, MC34181P, MC34182D Datasheet

Order this document by MC34181/D

MC34181,2,4

Low Power, High Slew Rate, MC33181,2,4

Wide Bandwidth, JFET Input

Operational Amplifiers

Quality bipolar fabrication with innovative design concepts are employed

for the MC33181/2/4,

MC34181/2/4

series of

monolithic

operational

8

8

amplifiers. This JFET

input series of

operational

amplifiers

operates at

1

1

210 μA per amplifier and offers 4.0 MHz of gain bandwidth product and

P SUFFIX

D SUFFIX

10 V/μs slew rate. Precision matching and an innovative trim technique of

PLASTIC PACKAGE

PLASTIC PACKAGE

the single and dual versions provide low input offset voltages. With a JFET

CASE 626

CASE 751

input stage, this series exhibits high input resistance, low input offset voltage

(SO±8)

and high gain. The all NPN output stage, characterized by no deadband

PIN CONNECTIONS

crossover distortion and large output voltage swing, provides high

capacitance drive capability, excellent phase and gain margins, low open

Offset Null

NC

loop high frequency output impedance and symmetrical source/sink AC

1

8

frequency response.

Inputs

2

±

7

VCC

The MC33181/2/4, MC34181/2/4 series of devices are specified over the

3

+

6

Output

commercial or industrial/vehicular temperature ranges. The complete series

VEE

4

5

Offset Null

of single, dual and quad operational amplifiers are available in the plastic

DIP as well as the SOIC surface mount packages.

(Single, Top View)

• Low Supply Current: 210 μA (Per Amplifier)

• Wide Supply Operating Range: ±1.5 V to ±18 V

Output 1

1

8

VCC

• Wide Bandwidth: 4.0 MHz

2 ±

1

7

Output 2

Inputs 1

• High Slew Rate: 10 V/μs

3

+

2

6

±

Inputs 2

• Low Input Offset Voltage: 2.0 mV

VEE 4

+

5

• Large Output Voltage Swing: ±14 V to +14 V (with ±15 V Supplies)

(Dual, Top View)

•Large Capacitance Drive Capability: 0 pF to 500 pF

•Low Total Harmonic Distortion: 0.04%

• Excellent Phase Margin: 67°
• Excellent Gain Margin: 6.7 dB				14				14
										1
• Output Short Circuit Protection				1
				P SUFFIX						D SUFFIX
• Offered in New TSSOP Package Including the Standard SOIC and
				PLASTIC PACKAGE				PLASTIC PACKAGE
DIP Packages
				CASE 646						CASE 751A
	ORDERING INFORMATION					14				(SO±14)
								1
Op Amp		Operating
						DTB SUFFIX
Function	Device	Temperature Range	Package
					PLASTIC PACKAGE
Single	MC34181P	TA = 0° to +70°C	Plastic DIP			CASE 948G
	MC34181D		SO±8			(TSSOP±14)
	MC33181P	TA = ±40° to +85°C	Plastic DIP	PIN CONNECTIONS
	MC33181D		SO±8
Dual	MC34182P	TA = 0° to +70°C	Plastic DIP	Output 1	1					14	Output 4
	MC34182D		SO±8		2					13
				Inputs 1		±			±±		Inputs 4
	MC33182P	TA = ±40° to +85°C	Plastic DIP		3	+	1	4	+	12
	MC33182D		SO±8	VCC 4							VEE
										11
Quad	MC34184P		Plastic DIP
					5					10
	MC34184D	TA = 0° to +70°C	SO±14	Inputs 2		+			+		Inputs 3
						±	2	3	±
	MC34184DTB		TSSOP±14		6					9
	MC33184P		Plastic DIP	Output 2	7					8	Output 3
	MC33184D	TA = ±40° to +85°C	SO±14			(Quad, Top View)
	MC33184DTB		TSSOP±14

Motorola, Inc. 1996

Rev 1

MC34181,2,4 MC33181,2,4

MAXIMUM RATINGS

Rating	Symbol	Value	Unit
Supply Voltage (from VCC to VEE)	VS	+36	V
Input Differential Voltage Range	VIDR	Note 1	V
Input Voltage Range	VIR	Note 1	V
Output Short Circuit Duration (Note 2)	tSC	Indefinite	sec
Operating Junction Temperature	TJ	+150	°C
Storage Temperature Range	Tstg	±60 to +150	°C

NOTES: 1. Either or both input voltages should not exceed the magnitude of VCC or VEE.

2.Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded (see Figure 1).

		Representative Schematic Diagram
			(Each Amplifier)
Internal						VCC
Bias	Q8
Network					Q9
						Q7
Neg			Pos
J1		J2		D		D
			C1	1		3
		+			R6
		Q1	Q4		D2	R7
						VO
Q2		Q3			C2
R1		R2		Q5	Q6
		I3
R3		R4		I4
			R5
VEE
	1	5
		Null Offsets
MC3X181 (Single) Only
			±
			+
			5
			1		VEE
			25 kΩ
			MC3X181 Input Offset
			Voltage Null CIrcuit

2	MOTOROLA ANALOG IC DEVICE DATA

MC34181,2,4 MC33181,2,4

DC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = ±15 V, TA = 25°C, unless otherwise noted.)

Characteristics	Symbol	Min	Typ	Max	Unit
Input Offset Voltage (RS = 50 Ω, VO = 0 V)	VIO				mV
Single
TA = +25°C		Ð	0.5	2.0
TA = 0° to +70°C (MC34181)		Ð	Ð	3.0
TA = ±40° to +85°C (MC33181)		Ð	Ð	3.5
Dual
TA = +25°C		Ð	1.0	3.0
TA = 0° to +70°C (MC34182)		Ð	Ð	4.0
TA = ±40° to +85°C (MC33182)		Ð	Ð	4.5
Quad
TA = +25°C		Ð	4.0	10
TA = 0° to +70°C (MC34184)		Ð	Ð	11
TA = ±40° to +85°C (MC33184)		Ð	Ð	11.5
Average Temperature Coefficient of VIO (RS = 50 Ω, VO = 0V)	VIO/ T	Ð	10	Ð	μV/°C
Input Offset Current (VCM = 0 V, VO = 0V)	IIO				nA
TA = +25°C		Ð	0.001	0.05
TA = 0° to +70°C		Ð	Ð	1.0
TA = ±40° to +85°C		Ð	Ð	2.0
Input Bias Current (VCM = 0 V, VO = 0V)	IIB				nA
TA = +25°C		Ð	0.003	0.1
TA = 0° to +70°C		Ð	Ð	2.0
TA = ±40° to +85°C		Ð	Ð	4.0
Input Common Mode Voltage Range	VICR	(VEE +4.0 V) to (VCC ±2.0 V)			V
Large Signal Voltage Gain (RL = 10 kΩ, VO = ±10 V)	AVOL				V/mV
TA = +25°C		25	60	Ð
TA = Tlow to Thigh		15	Ð	Ð
Output Voltage Swing (VID = 1.0 V, RL = 10 kΩ)	VO+	+13.5	+14	Ð	V
TA = +25°C	VO±	Ð	±14	±13.5
Common Mode Rejection (RS = 50 Ω, VCM = VICR, VO = 0 V)	CMR	70	86	Ð	dB
Power Supply Rejection (RS = 50 Ω, VCM = 0 V, VO = 0 V)	PSR	70	84	Ð	dB
Output Short Circuit Current (VID = 1.0 V, Output to Ground)	ISC	3.0	8.0	Ð	mA
Source
Sink		8.0	11	Ð
Power Supply Current (No Load, VO = 0 V)	ID				μA
Single
TA = +25°C		Ð	210	250
TA = Tlow to Thigh		Ð	Ð	250
Dual
TA = +25°C		Ð	420	500
TA = Tlow to Thigh		Ð	Ð	500
Quad
TA = +25°C		Ð	840	1000
TA = Tlow to Thigh		Ð	Ð	1000

MOTOROLA ANALOG IC DEVICE DATA	3

MC34181,2,4 MC33181,2,4

AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = ±15 V, TA = 25°C, unless otherwise noted.)

Characteristics	Symbol	Min	Typ	Max	Unit
Slew Rate (Vin = ±10 V to +10 V, RL = 10 kΩ, CL = 100 pF)	SR	7.0	10	Ð	V/μs
AV = +1.0
AV = ±1.0		Ð	10	Ð
Settling Time (AV = ±1.0, RL = 10 kΩ, VO = 0 V to +10 V Step)	ts	Ð	1.1	Ð	μs
To Within 0.10%
To Within 0.01%		Ð	1.5	Ð
Gain Bandwidth Product (f = 100 kHz)	GBW	3.0	4.0	Ð	MHz
Power Bandwidth (AV = +1.0, RL = 10 kΩ, VO = 20 Vpp, THD = 5.0%)	BWp	Ð	120	Ð	kHz
Phase Margin (±10 V < VO < +10 V)	fm				Degrees
RL = 10 kΩ		Ð	67	Ð
RL = 10 kΩ, CL = 100 pF		Ð	34	Ð
Gain Margin (±10 V < VO < +10 V)	Am				dB
RL = 10 kΩ		Ð	6.7	Ð
RL = 10 kΩ, CL = 100 pF		Ð	3.4	Ð
Equivalent Input Noise Voltage	en	Ð	38	Ð	nV/√
							Hz
RS = 100 Ω, f = 1.0 kHz
Equivalent Input Noise Current	in	Ð	0.01	Ð	pA/ √
							Hz
f = 1.0 kHz
Differential Input Capacitance	Ci	Ð	3.0	Ð	pF
Differential Input Resistance	Ri	Ð	1012	Ð	W
Total Harmonic Distortion	THD	Ð	0.04	Ð	%
AV = 10, RL = 10 kΩ, 2.0 Vpp < VO < 20 Vpp, f = 1.0 kHz
Channel Separation (RL = 10 kΩ, ±10 V < VO < +10 V, 0 Hz < f < 10 kHz)	Ð	Ð	120	Ð	dB
Open Loop Output Impedance	|Zo|	Ð	200	Ð	Ω
(f = 1.0 MHz)

Figure 1. Maximum Power Dissipation versus	Figure 2. Input Common Mode Voltage Range
Temperature for Package Variations	versus Temperature

DISSIPATIONPOWERMAXIMUM(mW)	2400											VOLTAGEMODECOMMONINPUT,	(V)RANGE
	2000
				8/14 Pin
	1600			Plastic
	1200					TSSOP±14
							SO±14
	800
				SO±8
D	400											ICR
,
P	0											V
	±55	±40	±20	0	20	40	60	80	100	120	140	160
				TA, AMBIENT TEMPERATURE (°C)

0

VCC = +3.0 V to +15 V

VCC (V

CM to VCC)

±1.0

VEE = ±3.0 V to ±15 V

VIO = 5.0 mV

±2.0

3.0

2.0

1.0

VEE

0

±55	±25	0	25	50	75	100	125
		TA, AMBIENT TEMPERATURE (°C)

4	MOTOROLA ANALOG IC DEVICE DATA