Philips 74HCT14U, 74HCT14PW, 74HCT14NB, 74HCT14N, 74HCT14DB Datasheet
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INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
∙The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
∙The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
∙The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT14
Hex inverting Schmitt trigger
Product specification |
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September 1993 |
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File under Integrated Circuits, IC06 |
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Philips Semiconductors |
Product specification |
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Hex inverting Schmitt trigger |
74HC/HCT14 |
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FEATURES
·Output capability: standard
·ICC category: SSI
GENERAL DESCRIPTION
The 74HC/HCT14 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT14 provide six inverting buffers with Schmitt-trigger action. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
SYMBOL |
PARAMETER |
CONDITIONS |
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TYPICAL |
UNIT |
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HC |
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HCT |
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tPHL/ tPLH |
propagation delay nA to nY |
CL = 15 pF; VCC = 5 V |
12 |
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17 |
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ns |
CI |
input capacitance |
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3.5 |
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3.5 |
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pF |
CPD |
power dissipation capacitance per gate |
notes 1 and 2 |
7 |
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8 |
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pF |
Notes
1. CPD is used to determine the dynamic power dissipation (PD in mW): PD = CPD ´ VCC2 ´ fi + å (CL ´ VCC2 ´ fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in V
å (CL ´ VCC2 ´ fo) = sum of outputs
2.For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC - 1.5 V
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
September 1993 |
2 |
Philips Semiconductors |
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Product specification |
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Hex inverting Schmitt trigger |
74HC/HCT14 |
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PIN DESCRIPTION |
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PIN NO. |
SYMBOL |
NAME AND FUNCTION |
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1, 3, 5, 9, 11, 13 |
1A to 6A |
data inputs |
2, 4, 6, 8, 10, 12 |
1Y to 6Y |
data outputs |
7 |
GND |
ground (0 V) |
14 |
VCC |
positive supply voltage |
Fig.1 |
Pin configuration. |
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Fig.2 Logic symbol. |
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Fig.3 |
IEC logic symbol. |
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FUNCTION TABLE |
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INPUT |
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OUTPUT |
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nA |
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nY |
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L |
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H |
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H |
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L |
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Notes |
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1. H = HIGH voltage level |
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L = LOW voltage level |
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APPLICATIONS |
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∙ |
Wave and pulse shapers |
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∙ |
Astable multivibrators |
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∙ |
Monostable multivibrators |
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Fig.4 |
Functional diagram. |
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Fig.5 Logic diagram |
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(one Schmitt trigger). |
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September 1993 |
3 |
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