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INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
∙The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
∙The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
∙The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC4049
Hex inverting high-to-low level shifter
Product specification |
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December 1990 |
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File under Integrated Circuits, IC06 |
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Philips Semiconductors |
Product specification |
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Hex inverting high-to-low level shifter |
74HC4049 |
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FEATURES
·Output capability: standard
·ICC category: SSI
This feature enables the inverting buffers to be used as logic level translators, which will convert high level logic to low level logic, while operating from a low voltage power supply. For example 15 V logic (“4000B series”) can be converted down to 2 V logic.
GENERAL DESCRIPTION
The 74HC4049 is a high-speed Si-gate CMOS device and is pin compatible with the “4049” of the “4000B” series. It is specified in compliance with JEDEC standard no. 7A.
The 74HC4049 provides six inverting buffers with a modified input protection structure, which has no diode connected to VCC. Input voltages of up to 15 V may therefore be used.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
The actual input switch level remains related to the VCC and is the same as mentioned in the family characteristics. At the same time each part can be used as a simple inverter without level translation.
APPLICATIONS
· Converting 15 V logic (“4000B” series) down to 2 V logic.
SYMBOL |
PARAMETER |
CONDITIONS |
TYPICAL |
UNIT |
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HC |
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tPHL/tPLH |
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propagation delay nA to nY |
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CL = 15 pF; VCC = 5 V |
8 |
ns |
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CI |
input capacitance |
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3.5 |
pF |
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CPD |
power dissipation capacitance per buffer |
note 1 |
14 |
pF |
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Note
1. CPD is used to determine the dynamic power dissipation (PD in mW): PD = CPD ´ VCC2 ´ fi + å (CL ´ VCC2 ´ fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in V
å (CL ´ VCC2 ´ fo) = sum of outputs
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
December 1990 |
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Philips Semiconductors |
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Product specification |
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Hex inverting high-to-low level shifter |
74HC4049 |
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PIN DESCRIPTION |
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PIN NO. |
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SYMBOL |
NAME AND FUNCTION |
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1 |
VCC |
positive supply voltage |
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2, 4, 6, 10, 12, 15 |
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data outputs |
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1Y |
to 6Y |
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3, 5, 7, 9, 11, 14 |
1A to 6A |
data inputs |
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8 |
GND |
ground (0 V) |
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13, 16 |
n.c. |
not connected |
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Fig.1 Pin configuration. |
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Fig.2 Logic symbol. |
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Fig.3 IEC logic symbol. |
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December 1990 |
3 |
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