Philips 74HCT251U, 74HCT251PW, 74HCT251N, 74HCT251DB, 74HCT251D Datasheet
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INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
∙The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
∙The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
∙The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT251
8-input multiplexer; 3-state
Product specification |
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December 1990 |
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File under Integrated Circuits, IC06 |
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Philips Semiconductors |
Product specification |
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8-input multiplexer; 3-state |
74HC/HCT251 |
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FEATURES
·True and complement outputs
·Both outputs are 3-state for further multiplexer expansion
·Multifunction capability
·Permits multiplexing from n-lines to one line
·Output capability: standard
·ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT251 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
The 74HC/HCT251 are the logic implementations of single-pole 8-position switches with the state of three select inputs (S0, S1, S2) controlling the switch positions.
Assertion (Y) and negation (Y) outputs are both provided. The output enable input (OE) is active LOW. The logic function provided at the output, when activated, is:
Y= OE.(I0.S0.S1.S2 + I1.S0.S1.S2 +
+I2.S0.S1.S2 + I3.S0.S1.S2 +
+I4.S0.S1.S2 + I5.S0.S1.S2 +
+I6.S0.S1.S2 + I7.S0.S1.S2)
Both outputs are in the high impedance OFF-state (Z) when the output enable input is HIGH, allowing multiplexer expansion by tying the outputs.
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PARAMETER |
CONDITIONS |
TYPICAL |
UNIT |
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HC |
HCT |
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tPHL/ tPLH |
propagation delay |
CL = 15 pF; VCC = 5 V |
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In to Y |
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15 |
19 |
ns |
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In to |
Y |
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17 |
19 |
ns |
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Sn to Y |
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20 |
20 |
ns |
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Sn to |
Y |
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21 |
21 |
ns |
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CI |
input capacitance |
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3.5 |
3.5 |
pF |
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CPD |
power dissipation capacitance per package |
notes 1 and 2 |
44 |
46 |
pF |
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Notes
1. CPD is used to determine the dynamic power dissipation (PD in mW): PD = CPD ´ VCC2 ´ fi + å (CL ´ VCC2 ´ fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
å (CL ´ VCC2 ´ fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC - 1.5 V
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
December 1990 |
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Philips Semiconductors |
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Product specification |
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8-input multiplexer; 3-state |
74HC/HCT251 |
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PIN DESCRIPTION |
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PIN NO. |
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SYMBOL |
NAME AND FUNCTION |
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4, 3, 2, 1, 15, 14, 13, 12 |
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I0 to I7 |
multiplexer inputs |
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5 |
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Y |
multiplexer output |
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6 |
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complementary multiplexer output |
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Y |
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7 |
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3-state output enable input (active LOW) |
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OE |
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8 |
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GND |
ground (0 V) |
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11, 10, 9 |
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S0, S1, S2 |
select inputs |
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16 |
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VCC |
positive supply voltage |
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Fig.1 Pin configuration. |
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Fig.2 Logic symbol. |
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Fig.3 IEC logic symbol. |
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December 1990 |
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