MC74VHCT126A
Quad Bus Buffer with 3±State Control Inputs
The MC74VHCT126A is a high speed CMOS quad bus buffer fabricated with silicon gate CMOS technology. It achieves noninverting high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.
The MC74VHCT126A requires the 3±state control input (OE) to be set Low to place the output into high impedance.
The VHCT inputs are compatible with TTL levels. This device can be used as a level converter for interfacing 3.3V to 5.0V, because it has full 5V CMOS level output swings.
The VHCT126A input structures provide protection when voltages between 0V and 5.5V are applied, regardless of the supply voltage. The output structures also provide protection when VCC = 0V. These input and output structures help prevent device destruction caused by supply voltage ± input/output voltage mismatch, battery backup, hot insertion, etc.
The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems.
•High Speed: tPD = 3.8ns (Typ) at VCC = 5V
•Low Power Dissipation: ICC = 4μA (Max) at TA = 25°C
•TTL±Compatible Inputs: VIL = 0.8V; VIH = 2.0V
•Power Down Protection Provided on Inputs
•Balanced Propagation Delays
•Designed for 2V to 5.5V Operating Range
•Low Noise: VOLP = 0.8V (Max)
•Pin and Function Compatible with Other Standard Logic Families
•Latchup Performance Exceeds 300mA
•ESD Performance: HBM > 2000V; Machine Model > 200V
•Chip Complexity: 72 FETs or 18 Equivalent Gates
LOGIC DIAGRAM
Active±High Output Enables
A1 |
2 |
3 |
Y1 |
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OE1 |
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5 |
6 |
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A2 |
Y2 |
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4 |
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FUNCTION TABLE |
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OE2 |
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9 |
8 |
Y3 |
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VHCT126A |
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A3 |
Inputs |
Output |
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10 |
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OE3 |
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A |
OE |
Y |
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12 |
11 |
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H |
H |
H |
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A4 |
Y4 |
L |
H |
L |
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X |
L |
Z |
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13 |
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OE4 |
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http://onsemi.com
14±LEAD SOIC |
14±LEAD TSSOP |
D SUFFIX |
DT SUFFIX |
CASE 751A |
CASE 948G |
14±LEAD SOIC EIAJ
M SUFFIX
CASE 965
PIN CONNECTION AND
MARKING DIAGRAM (Top View)
OE1 |
1 |
14 |
VCC |
A1 |
2 |
13 |
OE4 |
Y1 |
3 |
12 |
A4 |
OE2 |
4 |
11 |
Y4 |
A2 |
5 |
10 |
OE3 |
Y2 |
6 |
9 |
A3 |
GND |
7 |
8 |
Y3 |
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For detailed package marking information, see the Marking Diagram section on page 4 of this data sheet.
ORDERING INFORMATION
Device |
Package |
Shipping |
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MC74VHCT126AD |
SOIC |
55 Units/Rail |
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MC74VHCT126ADT |
TSSOP |
96 Units/Rail |
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MC74VHCT126AM |
SOIC EIAJ |
50 Units/Rail |
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Semiconductor Components Industries, LLC, 2000 |
1 |
Publication Order Number: |
April, 2000 ± Rev. 1 |
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MC74VHCT126A/D |
MC74VHCT126A
MAXIMUM RATINGS*
Symbol |
Parameter |
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Value |
Unit |
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VCC |
DC Supply Voltage |
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± 0.5 to + 7.0 |
V |
Vin |
DC Input Voltage |
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± 0.5 to + 7.0 |
V |
Vout |
DC Output Voltage |
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± 0.5 to VCC + 0.5 |
V |
IIK |
Input Diode Current |
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± 20 |
mA |
IOK |
Output Diode Current |
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± 20 |
mA |
Iout |
DC Output Current, per Pin |
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± 25 |
mA |
ICC |
DC Supply Current, VCC and GND Pins |
± 50 |
mA |
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PD |
Power Dissipation in Still Air, |
SOIC Packages² |
500 |
mW |
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TSSOP Package² |
450 |
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Tstg |
Storage Temperature |
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± 65 to + 150 |
_C |
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high±impedance circuit. For proper operation, Vin and Vout should be constrained to the
range GND v (Vin or Vout) v VCC. Unused inputs must always be
tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.
*Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute±maximum±rated conditions is not implied.
²Derating Ð SOIC Packages: ± 7 mW/ _C from 65_ to 125_C TSSOP Package: ± 6.1 mW/_C from 65_ to 125_C
RECOMMENDED OPERATING CONDITIONS
Symbol |
Parameter |
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Min |
Max |
Unit |
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VCC |
DC Supply Voltage |
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4.5 |
5.5 |
V |
Vin |
DC Input Voltage |
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0 |
5.5 |
V |
Vout |
DC Output Voltage |
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0 |
VCC |
V |
TA |
Operating Temperature, All Package Types |
± 40 |
+ 85 |
_C |
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tr, tf |
Input Rise and Fall Time |
VCC =5.0V ±0.5V |
0 |
20 |
ns/V |
DC ELECTRICAL CHARACTERISTICS
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VCC |
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TA = 25°C |
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TA ≤ 85°C |
TA ≤ 125°C |
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Symbol |
Parameter |
Test Conditions |
(V) |
Min |
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Typ |
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Max |
Min |
Max |
Min |
Max |
Unit |
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VIH |
Minimum High±Level Input |
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3.0 |
1.2 |
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1.2 |
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1.2 |
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V |
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Voltage |
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4.5 |
2.0 |
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2.0 |
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2.0 |
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5.5 |
2.0 |
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2.0 |
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2.0 |
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VIL |
Maximum Low±Level Input |
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3.0 |
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0.53 |
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0.53 |
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0.53 |
V |
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Voltage |
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4.5 |
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0.8 |
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0.8 |
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0.8 |
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5.5 |
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0.8 |
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0.8 |
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0.8 |
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VOH |
Minimum High±Level |
VIN = VIH or VIL |
3.0 |
2.9 |
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3.0 |
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2.9 |
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2.9 |
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V |
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Output Voltage |
IOH = ± 50μA |
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4.5 |
4.4 |
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4.5 |
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4.4 |
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4.4 |
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VIN = VIH or VIL |
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VIN = VIH or VIL |
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IOH = ± 4mA |
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3.0 |
2.58 |
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2.48 |
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2.34 |
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IOH = ± 8mA |
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4.5 |
3.94 |
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3.80 |
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3.66 |
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VOL |
Maximum Low±Level |
VIN = VIH or VIL |
3.0 |
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0.0 |
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0.1 |
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0.1 |
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0.1 |
V |
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Output Voltage |
IOL = 50μA |
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4.5 |
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0.0 |
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0.1 |
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0.1 |
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0.1 |
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VIN = VIH or VIL |
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V |
= V |
IH |
or V |
IL |
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IN |
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IOL = 4mA |
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3.0 |
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0.36 |
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0.44 |
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0.52 |
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IOL = 8mA |
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4.5 |
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0.36 |
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0.44 |
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0.52 |
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IIN |
Maximum Input Leakage |
VIN = 5.5 V or |
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0 to 5.5 |
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± 0.1 |
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± 1.0 |
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± 1.0 |
μA |
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Current |
GND |
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ICC |
Maximum Quiescent Supply |
VIN = VCC or GND |
5.5 |
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2.0 |
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20 |
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40 |
μA |
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Current |
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ICCT |
Quiescent Supply Current |
Input: VIN = 3.4V |
5.5 |
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1.35 |
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1.50 |
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1.65 |
mA |
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IOPD |
Output Leakage Current |
VOUT = 5.5V |
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0.0 |
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0.5 |
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5.0 |
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10 |
μA |
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2
MC74VHCT126A
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)
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TA = 25°C |
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TA = ≤ 85°C |
TA ≤ 125°C |
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Symbol |
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Parameter |
Test Conditions |
Min |
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Typ |
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Max |
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Min |
Max |
Min |
Max |
Unit |
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tPLH, |
Maximum Propagation |
VCC = 3.3 ± 0.3V CL = 15pF |
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5.6 |
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8.0 |
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1.0 |
9.5 |
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12.0 |
ns |
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tPHL |
Delay, A to Y |
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CL = 50pF |
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8.1 |
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11.5 |
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1.0 |
13.0 |
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16.0 |
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VCC = 5.0 ± 0.5V CL = 15pF |
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3.8 |
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5.5 |
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1.0 |
6.5 |
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8.5 |
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CL = 50pF |
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5.3 |
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7.5 |
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1.0 |
8.5 |
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10.5 |
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tPZL, |
Maximum Output Enable |
VCC = 3.3 ± 0.3V CL = 15pF |
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5.4 |
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8.0 |
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1.0 |
9.5 |
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11.5 |
ns |
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tPZH |
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RL = 1kΩ |
CL = 50pF |
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TIme,OE |
to Y |
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7.9 |
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11.5 |
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1.0 |
13.0 |
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15.0 |
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VCC = 5.0 ± 0.5V CL = 15pF |
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3.6 |
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5.1 |
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1.0 |
6.0 |
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7.5 |
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RL = 1kΩ |
CL = 50pF |
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5.1 |
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7.1 |
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1.0 |
8.0 |
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9.5 |
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tPLZ, |
Maximum Output Disable |
VCC = 3.3 ± 0.3V CL = 50pF |
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9.5 |
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13.2 |
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1.0 |
15.0 |
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18.0 |
ns |
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tPHZ |
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to Y |
RL = 1kΩ |
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Time,OE |
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VCC = 5.0 ± 0.5V CL = 50pF |
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6.1 |
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8.8 |
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1.0 |
10.0 |
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12.0 |
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RL = 1kΩ |
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tOSLH, |
Output±to±Output Skew |
VCC = 3.3 ± 0.3V CL = 50pF |
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1.5 |
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1.5 |
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2.0 |
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tOSHL |
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(Note 1.) |
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VCC = 5.0 ± 0.5V CL = 50pF |
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1.0 |
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1.0 |
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1.5 |
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(Note 1.) |
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Cin |
Maximum Input |
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4 |
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10 |
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10 |
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pF |
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Capacitance |
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Cout |
Maximum Three±State |
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6 |
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pF |
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Output Capacitance (Output |
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in High Impedance State) |
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Typical @ 25°C, VCC = 5.0V |
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CPD |
Power Dissipation Capacitance (Note 2.) |
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1.Parameter guaranteed by design. tOSLH = |tPLHm ± tPLHn|, tOSHL = |tPHLm ± tPHLn|.
2.CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC / 4 (per buffer). CPD is used to determine the no±load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 5.0V)
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TA = 25°C |
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Symbol |
Characteristic |
Typ |
Max |
Unit |
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VOLP |
Quiet Output Maximum Dynamic VOL |
0.3 |
0.8 |
V |
VOLV |
Quiet Output Minimum Dynamic VOL |
± 0.3 |
± 0.8 |
V |
VIHD |
Minimum High Level Dynamic Input Voltage |
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3.5 |
V |
VILD |
Maximum Low Level Dynamic Input Voltage |
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1.5 |
V |
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