MOTOROLA MC74VHCT245AML2, MC74VHCT245AML1, MC74VHCT245AM, MC74VHCT245ADT, MC74VHCT245ADTR2 Datasheet
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal Bus Transceiver
The MC74VHCT245A is an advanced high speed CMOS octal bus transceiver fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.
It is intended for two±way asynchronous communication between data buses. The direction of data transmission is determined by the level of the DIR input. The output enable pin (OE) can be used to disable the device, so that the buses are effectively isolated.
All inputs are equipped with protection circuits against static discharge. The VHCT inputs are compatible with TTL levels. This device can be used
as a level converter for interfacing 3.3V to 5.0V, because it has full 5V CMOS level output swings.
The VHCT245A input and output (when disabled) structures provide protection when voltages between 0V and 5.5V are applied, regardless of the supply voltage. These input and output structures help prevent device destruction caused by supply voltage ± input/output voltage mismatch, battery backup, hot insertion, etc.
•High Speed: tPD = 4.9ns (Typ) at VCC = 5V
•Low Power Dissipation: ICC = 4μA (Max) at TA = 25°C
•TTL±Compatible Inputs: VIL = 0.8V; VIH = 2.0V
•Power Down Protection Provided on Inputs and Outputs
•Balanced Propagation Delays
•Designed for 4.5V to 5.5V Operating Range
•Low Noise: VOLP = 1.6V (Max)
•Pin and Function Compatible with Other Standard Logic Families
•Latchup Performance Exceeds 300mA
•ESD Performance: HBM > 2000V; Machine Model > 200V
•Chip Complexity: 304 FETs or 76 Equivalent Gates
APPLICATION NOTES
1.Do not force a signal on an I/O pin when it is an active output, damage may occur.
2.All floating (high impedence) input or I/O pins must be fixed by means of pull up or pull down resistors or bus terminator ICs.
LOGIC DIAGRAM
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A1 |
2 |
18 |
B1 |
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A2 |
3 |
17 |
B2 |
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A3 |
4 |
16 |
B3 |
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A A4 |
5 |
15 |
B4 |
B |
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DATA |
A5 |
6 |
14 |
B5 |
DATA |
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PORT |
PORT |
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7 |
13 |
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A6 |
B6 |
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A7 |
8 |
12 |
B7 |
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A8 |
9 |
11 |
B8 |
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DIR |
1 |
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OE |
19 |
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MC74VHCT245A
DW SUFFIX
20±LEAD SOIC PACKAGE
CASE 751D±04
DT SUFFIX
20±LEAD TSSOP PACKAGE
CASE 948E±02
M SUFFIX
20±LEAD SOIC EIAJ PACKAGE
CASE 967±01
ORDERING INFORMATION
MC74VHCTXXXADW SOIC
MC74VHCTXXXADT TSSOP
MC74VHCTXXXAM SOIC EIAJ
PIN ASSIGNMENT
DIR |
1 |
20 |
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VCC |
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A1 |
2 |
19 |
OE |
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A2 |
3 |
18 |
B1 |
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A3 |
4 |
17 |
B2 |
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A4 |
5 |
16 |
B3 |
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A5 |
6 |
15 |
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B4 |
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A6 |
7 |
14 |
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B5 |
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A7 |
8 |
13 |
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B6 |
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A8 |
9 |
12 |
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B7 |
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GND |
10 |
11 |
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B8 |
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FUNCTION TABLE
Control Inputs |
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OE |
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DIR |
Operation |
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L |
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L |
Data Tx from Bus B to Bus A |
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L |
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H |
Data Tx from Bus A to Bus B |
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H |
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X |
Buses Isolated (High±Z State) |
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6/97
Motorola, Inc. 1997 |
1 |
REV 0 |
MC74VHCT245A
MAXIMUM RATINGS*
VCC |
DC Supply Voltage |
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± 0.5 to + 7.0 |
V |
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Vin |
DC Input Voltage |
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± 0.5 to + 7.0 |
V |
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VI/O |
DC Output Voltage |
Outputs in 3±State |
± 0.5 to + 7.0 |
V |
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High or Low State |
± 0.5 to VCC + 0.5 |
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IIK |
Input Diode Current |
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± 20 |
mA |
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IOK |
Output Diode Current (VOUT < GND; VOUT > VCC) |
± 20 |
mA |
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Iout |
DC Output Current, per Pin |
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± 25 |
mA |
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ICC |
DC Supply Current, VCC and GND Pins |
± 75 |
mA |
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PD |
Power Dissipation in Still Air, |
SOIC Packages² |
500 |
mW |
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TSSOP Package² |
450 |
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Tstg |
Storage Temperature |
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± 65 to + 150 |
_C |
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*Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute±maximum±rated conditions is not implied.
²Derating Ð SOIC Packages: ± 7 mW/ _C from 65_ to 125_C TSSOP Package: ± 6.1 mW/_C from 65_ to 125_C
RECOMMENDED OPERATING CONDITIONS
Symbol |
Parameter |
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Min |
Max |
Unit |
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VCC |
DC Supply Voltage |
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4.5 |
5.5 |
V |
Vin |
DC Input Voltage |
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0 |
5.5 |
V |
VI/O |
DC Output Voltage |
Outputs in 3±State |
0 |
5.5 |
V |
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High or Low State |
0 |
VCC |
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TA |
Operating Temperature |
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± 40 |
+ 85 |
_C |
tr, tf |
Input Rise and Fall Time |
VCC =5.0V ±0.5V |
0 |
20 |
ns/V |
DC ELECTRICAL CHARACTERISTICS
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high±impedance circuit. For proper operation, Vin and Vout should be constrained to the
range GND v (Vin or Vout) v VCC. Unused inputs must always be
tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.
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VCC |
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TA = 25°C |
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TA = ± 40 to 85°C |
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Symbol |
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Parameter |
Test Conditions |
V |
Min |
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Typ |
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Max |
Min |
Max |
Unit |
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VIH |
Minimum High±Level |
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4.5 to |
2.0 |
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2.0 |
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V |
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Input Voltage |
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5.5 |
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VIL |
Maximum Low±Level |
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4.5 to |
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0.8 |
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0.8 |
V |
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Input Voltage |
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5.5 |
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VOH |
Minimum High±Level |
IOH = ± 50μA |
4.5 |
4.4 |
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4.5 |
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4.4 |
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V |
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Output Voltage |
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V |
= V |
IH |
or V |
IL |
IOH = ± 8mA |
4.5 |
3.94 |
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3.80 |
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in |
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VOL |
Maximum Low±Level |
IOL = 50μA |
4.5 |
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0.0 |
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0.1 |
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0.1 |
V |
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Output Voltage |
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V |
= V |
IH |
or V |
IL |
IOL = 8mA |
4.5 |
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0.36 |
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0.44 |
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in |
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Iin |
Maximum Input |
Vin = 5.5 V or GND |
0 to 5.5 |
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± 0.1 |
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± 1.0 |
μA |
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Leakage Current |
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IOZ |
Maximum 3±State |
Vin = VIL or VIH |
5.5 |
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± 0.25 |
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± 2.5 |
μA |
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Leakage Current |
Vout = VCC or GND |
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ICC |
Maximum Quiescent |
Vin = VCC or GND |
5.5 |
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4.0 |
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40.0 |
μA |
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Supply Current |
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ICCT |
Quiescent Supply |
Per Input: VIN = 3.4V |
5.5 |
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1.35 |
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1.50 |
mA |
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Current |
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Other Input: VCC or GND |
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IOPD |
Output Leakage |
VOUT = 5.5V |
0 |
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0.5 |
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5.0 |
μA |
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Current |
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MOTOROLA |
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2 |
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VHC Data ± Advanced CMOS Logic |
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DL203 Ð Rev 1 |
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