MOTOROLA MC74VHC4052D, MC74VHC4052DR2, MC74VHC4052DT, MC74VHC4052DTR2, MC74VHC4051DR2 Datasheet

VHC4051 Ð 184 FETs or 46 Equivalent Gates VHC4052 Ð 168 FETs or 42 Equivalent Gates VHC4053 Ð 156 FETs or 39 Equivalent Gates

MC74VHC4051,

MC74VHC4052,

MC74VHC4053

Analog Multiplexers /

Demultiplexers

High±Performance Silicon±Gate CMOS

The MC74VHC4051, MC74VHC4052 and MC74VHC4053 utilize silicon±gate CMOS technology to achieve fast propagation delays, low ON resistances, and low OFF leakage currents. These analog multiplexers/demultiplexers control analog voltages that may vary across the complete power supply range (from VCC to VEE).

The VHC4051, VHC4052 and VHC4053 are identical in pinout to the high±speed HC4051A, HC4052A and HC4053A, and the metal±gate MC14051B, MC14052B and MC14053B. The Channel±Select inputs determine which one of the Analog Inputs/Outputs is to be connected, by means of an analog switch, to the Common Output/Input. When the Enable pin is HIGH, all analog switches are turned off.

The Channel±Select and Enable inputs are compatible with standard CMOS outputs; with pullup resistors they are compatible with LSTTL outputs.

These devices have been designed so that the ON resistance (Ron) is more linear over input voltage than Ron of metal±gate CMOS analog switches.

•Fast Switching and Propagation Speeds

•Low Crosstalk Between Switches

•Diode Protection on All Inputs/Outputs

•Analog Power Supply Range (VCC ± VEE) = 2.0 to 12.0 V

•Digital (Control) Power Supply Range (VCC ± GND) = 2.0 to 6.0 V

•Improved Linearity and Lower ON Resistance Than Metal±Gate Counterparts

•Low Noise

•Chip Complexity:

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			MARKING
			DIAGRAMS
			16
		SO±16	VHC405x
		D SUFFIX
	16		AWLYWW
		CASE 751B
		1	1
			16
		TSSOP±16	VHC
	16	DT SUFFIX	405x
		CASE 948F	ALYW
		1
			1

A = Assembly Location

WL = Wafer Lot

YY = Year

WW = Work Week

ORDERING INFORMATION

See detailed ordering and shipping information in the package dimensions section on page 14 of this data sheet.

Semiconductor Components Industries, LLC, 1999	1	Publication Order Number:
March, 2000 ± Rev. 3		MC74VHC4051/D

MC74VHC4051, MC74VHC4052, MC74VHC4053

LOGIC DIAGRAM

FUNCTION TABLE ± MC74VHC4051

MC74VHC4051

Control Inputs

Single±Pole, 8±Position Plus Common Off

Select

13

Enable

C

B

A

ON Channels

X0

14

L

L

L

L

X0

X1

L

L

L

H

X1

15

X2

3

X COMMON

L

L

H

L

X2

ANALOG

12

L

L

H

H

X3

INPUTS/

X3

MULTIPLEXER/

OUTPUT/

1

INPUT

L

H

L

L

X4

OUTPUTS

X4

DEMULTIPLEXER

5

L

H

L

H

X5

X5

L

H

H

L

X6

2

X6

L

H

H

H

X7

4

X7

H

X

X

X

NONE

11

CHANNEL

A

X = Don't Care

10

B

SELECT

Pinout: MC74VHC4051 (Top View)

9

INPUTS

C

6

ENABLE

VCC

X2

X1

X0

X3

A

B

C

PIN 16 = VCC

16

15

14

13

12

11

10

9

PIN 7 = VEE

PIN 8 = GND

1

2

3

4

5

6

7

8

FUNCTION TABLE ± MC74VHC4052

LOGIC DIAGRAM

Control Inputs

MC74VHC4052

Select

Double±Pole, 4±Position Plus Common Off

Enable

B

A

ON Channels

12

X0

L

L

L

Y0

X0

14

X1

X SWITCH

13

X

L

L

H

Y1

X1

15

X2

L

H

L

Y2

X2

ANALOG

X3

11

COMMON

L

H

H

Y3

X3

H

X

X

NONE

INPUTS/OUTPUTS

Y0

1

OUTPUTS/INPUTS

X = Don't Care

5

3

Y1

Y SWITCH

Y

2

Y2

4

Y3

Pinout: MC74VHC4052 (Top View)

10

CHANNEL-SELECT

A

VCC

X2

X1

X

X0

X3

A

B

9

PIN 16 = VCC

INPUTS

B

16

15

14

13

12

11

10

9

PIN 7 = VEE

PIN 8 = GND

ENABLE 6

1		2		3		4		5		6		7		8
Y0		Y2		Y		Y3		Y1	Enable			VEE	GND

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MC74VHC4051, MC74VHC4052, MC74VHC4053

LOGIC DIAGRAM

MC74VHC4053

Triple Single±Pole, Double±Position Plus Common Off

	X0	12	14	X
	X1	13	X SWITCH
ANALOG	Y0	2	15	Y	COMMON
	Y1	1	Y SWITCH		OUTPUTS/INPUTS
INPUTS/OUTPUTS
	Z0	5	4
	Z1	3	Z SWITCH	Z
	A 11
CHANNEL-SELECT	B 10		PIN 16 = VCC
INPUTS	C	9	PIN 7 = VEE
		6	PIN 8 = GND
ENABLE

NOTE: This device allows independent control of each switch. Channel±Select Input A controls the X±Switch, Input B controls the Y±Switch and Input C controls the Z±Switch

FUNCTION TABLE ± MC74VHC4053

Control Inputs
		Select
Enable	C	B	A	ON Channels
L	L	L	L	Z0	Y0	X0
L	L	L	H	Z0	Y0	X1
L	L	H	L	Z0	Y1	X0
L	L	H	H	Z0	Y1	X1
L	H	L	L	Z1	Y0	X0
L	H	L	H	Z1	Y0	X1
L	H	H	L	Z1	Y1	X0
L	H	H	H	Z1	Y1	X1
H	X	X	X		NONE

X = Don't Care

Pinout: MC74VHC4053 (Top View)

VCC		Y		X		X1		X0		A		B		C
16		15		14		13		12		11		10		9

1		2		3		4		5		6		7		8
Y1		Y0		Z1		Z		Z0	Enable			VEE	GND

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MC74VHC4051, MC74VHC4052, MC74VHC4053

MAXIMUM RATINGS*

Symbol	Parameter		Value	Unit
VCC	Positive DC Supply Voltage	(Referenced to GND)	± 0.5 to + 7.0	V
		(Referenced to VEE)	± 0.5 to + 14.0
VEE	Negative DC Supply Voltage (Referenced to GND)		± 7.0 to + 5.0	V
VIS	Analog Input Voltage		VEE ± 0.5 to	V
			VCC + 0.5
Vin	Digital Input Voltage (Referenced to GND)		± 0.5 to VCC + 0.5	V
I	DC Current, Into or Out of Any Pin		± 25	mA
PD	Power Dissipation in Still Air,	SOIC Package²	500	mW
		TSSOP Package²	450
Tstg	Storage Temperature Range		± 65 to + 150	_C
TL	Lead Temperature, 1 mm from Case for 10 Seconds		260	_C

*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions.

²Derating Ð SOIC Package: ± 7 mW/ _C from 65_ to 125_C

TSSOP Package: ± 6.1 mW/_C from 65_ to 125_C

RECOMMENDED OPERATING CONDITIONS

Symbol	Parameter			Min	Max	Unit
VCC	Positive DC Supply Voltage	(Referenced to GND)		2.0	6.0	V
		(Referenced to VEE)		2.0	12.0
VEE	Negative DC Supply Voltage, Output (Referenced to			± 6.0	GND	V
	GND)
VIS	Analog Input Voltage			VEE	VCC	V
Vin	Digital Input Voltage (Referenced to GND)			GND	VCC	V
VIO*	Static or Dynamic Voltage Across Switch				1.2	V
TA	Operating Temperature Range, All Package Types			± 55	+ 125	_C
tr, tf	Input Rise/Fall Time		VCC = 2.0 V	0	1000	ns
	(Channel Select or Enable Inputs)		VCC = 3.0 V	0	800
			VCC = 4.5 V	0	500
			VCC = 6.0 V	0	400

*For voltage drops across switch greater than 1.2V (switch on), excessive VCC current may be drawn; i.e., the current out of the switch may contain both VCC and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded.

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high±impedance circuit. For proper operation, Vin and Vout should be constrained to the

range GND v (Vin or Vout) v VCC. Unused inputs must always be

tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.

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MC74VHC4051, MC74VHC4052, MC74VHC4053

DC CHARACTERISTICS Ð Digital Section (Voltages Referenced to GND) VEE = GND, Except Where Noted

				VCC	Guaranteed Limit
Symbol	Parameter	Condition		V	±55 to 25°C	≤85°C	≤125°C		Unit
VIH	Minimum High±Level Input	Ron = Per Spec		2.0	1.50	1.50		1.50	V
	Voltage, Channel±Select or			3.0	2.10	2.10		2.10
	Enable Inputs			4.5	3.15	3.15		3.15
				6.0	4.20	4.20		4.20
VIL	Maximum Low±Level Input	Ron = Per Spec		2.0	0.5	0.5		0.5	V
	Voltage, Channel±Select or			3.0	0.9	0.9		0.9
	Enable Inputs			4.5	1.35	1.35		1.35
				6.0	1.8	1.8		1.8
Iin	Maximum Input Leakage Current,	Vin = VCC or GND,		6.0	± 0.1	± 1.0		± 1.0	μA
	Channel±Select or Enable Inputs	VEE = ± 6.0 V
ICC	Maximum Quiescent Supply	Channel Select, Enable and							μA
	Current (per Package)	VIS = VCC or GND;	VEE = GND	6.0	1	10		40
		VIO = 0 V	VEE = ± 6.0	6.0	4	40		80

DC ELECTRICAL CHARACTERISTICS Analog Section

						Guaranteed Limit
				VCC	VEE
						± 55 to	v		_		v	_
Symbol	Parameter		Test Conditions	V	V	_		85		C			Unit
						25 C						125 C
Ron	Maximum ªONº Resistance		Vin = VIL or VIH	3.0	0.0	200	240					320	Ω
			VIS = VCC to VEE	4.5	0.0	160	200					280
			IS v 2.0 mA (Figures 1, 2)	4.5	± 4.5	120	150					170
				6.0	± 6.0	100	125					140
			Vin = VIL or VIH	3.0	0.0	150	180					230
			VIS = VCC or VEE	4.5	0.0	110	140					190
			(Endpoints)	4.5	± 4.5	90	120					140
			IS v 2.0 mA (Figures 1, 2)	6.0	± 6.0	80	100					115
Ron	Maximum Difference in ªONº		Vin = VIL or VIH	3.0	0.0	40		50				80	Ω
	Resistance Between Any Two		VIS = 1/2 (VCC ± VEE)	4.5	0.0	20		25				40
	Channels in the Same Package		IS v 2.0 mA	4.5	± 4.5	10		15				18
				6.0	± 6.0	10		12				14
Ioff	Maximum Off±Channel Leakage		Vin = VIL or VIH;										μA
	Current, Any One Channel		VIO = VCC ± VEE;	6.0	± 6.0	0.1		0.5				1.0
			Switch Off (Figure 3)
	Maximum Off±Channel VHC4051		Vin = VIL or VIH;	6.0	± 6.0	0.2		2.0				4.0
	Leakage Current,	VHC4052	VIO = VCC ± VEE;	6.0	± 6.0	0.1		1.0				2.0
	Common Channel	VHC4053	Switch Off (Figure 4)	6.0	± 6.0	0.1		1.0				2.0
Ion	Maximum On±Channel VHC4051		Vin = VIL or VIH;	6.0	± 6.0	0.2		2.0				4.0	μA
	Leakage Current,	VHC4052	Switch±to±Switch =	6.0	± 6.0	0.1		1.0				2.0
	Channel±to±Channel	VHC4053	VCC ± VEE; (Figure 5)	6.0	± 6.0	0.1		1.0				2.0

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