MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad 2-Input NAND Gate
The MC74VHCT00A is an advanced high speed CMOS 2±input NAND gate fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.
The VHCT inputs are compatible with TTL levels. This device can be used as a level converter for interfacing 3.3V to 5.0V, because it has full 5V CMOS level output swings.
The VHCT00A input structures provide protection when voltages between 0V and 5.5V are applied, regardless of the supply voltage. The output structures also provide protection when VCC = 0V. These input and output structures help prevent device destruction caused by supply voltage ± input/output voltage mismatch, battery backup, hot insertion, etc.
•High Speed: tPD = 5.0ns (Typ) at VCC = 5V
•Low Power Dissipation: ICC = 2μA (Max) at TA = 25°C
•TTL±Compatible Inputs: VIL = 0.8V; VIH = 2.0V
•Power Down Protection Provided on Inputs and Outputs
•Balanced Propagation Delays
•Designed for 4.5V to 5.5V Operating Range
•Low Noise: VOLP = 0.8V (Max)
•Pin and Function Compatible with Other Standard Logic Families
•Latchup Performance Exceeds 300mA
•ESD Performance: HBM > 2000V; Machine Model > 200V
•Chip Complexity: 48 FETs or 12 Equivalent Gates
LOGIC DIAGRAM
A1 |
1 |
3 |
Y1 |
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2 |
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B1 |
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A2 |
4 |
6 |
Y2 |
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5 |
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B2 |
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9 |
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Y = AB |
A3 |
8 |
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Y3 |
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B3 |
10 |
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A4 |
12 |
11 |
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Y4 |
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B4 |
13 |
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Pinout: 14±Lead Packages (Top View)
VCC |
B4 |
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A4 |
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Y4 |
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B3 |
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A3 |
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Y3 |
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14 |
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13 |
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12 |
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11 |
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10 |
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9 |
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8 |
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1 |
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2 |
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3 |
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4 |
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5 |
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6 |
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7 |
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A1 |
B1 |
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Y1 |
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A2 |
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B2 |
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Y2 |
GND |
MC74VHCT00A
D SUFFIX
14±LEAD SOIC PACKAGE
CASE 751A±03
DT SUFFIX
14±LEAD TSSOP PACKAGE
CASE 948G±01
M SUFFIX
14±LEAD SOIC EIAJ PACKAGE
CASE 965±01
ORDERING INFORMATION
MC74VHCTXXAD SOIC MC74VHCTXXADT TSSOP MC74VHCTXXAM SOIC EIAJ
FUNCTION TABLE
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Inputs |
Output |
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A |
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B |
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Y |
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L |
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L |
H |
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L |
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H |
H |
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H |
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L |
H |
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H |
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H |
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L |
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6/97
Motorola, Inc. 1997 |
1 |
REV 0 |
MC74VHCT00A
MAXIMUM RATINGS*
Symbol |
Parameter |
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Value |
Unit |
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VCC |
DC Supply Voltage |
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± 0.5 to + 7.0 |
V |
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Vin |
DC Input Voltage |
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± 0.5 to + 7.0 |
V |
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Vout |
DC Output Voltage |
VCC = 0 |
± 0.5 to + 7.0 |
V |
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High or Low State |
± 0.5 to VCC + 0.5 |
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IIK |
Input Diode Current |
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± 20 |
mA |
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IOK |
Output Diode Current (VOUT < GND; VOUT > VCC) |
± 20 |
mA |
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Iout |
DC Output Current, per Pin |
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± 25 |
mA |
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ICC |
DC Supply Current, VCC and GND Pins |
± 50 |
mA |
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PD |
Power Dissipation in Still Air, |
SOIC Packages² |
500 |
mW |
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TSSOP Package² |
450 |
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Tstg |
Storage Temperature |
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± 65 to + 150 |
_C |
*Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute±maximum±rated conditions is not implied.
²Derating Ð SOIC Packages: ± 7 mW/ _C from 65_ to 125_C TSSOP Package: ± 6.1 mW/_C from 65_ to 125_C
RECOMMENDED OPERATING CONDITIONS
Symbol |
Parameter |
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Min |
Max |
Unit |
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VCC |
DC Supply Voltage |
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4.5 |
5.5 |
V |
Vin |
DC Input Voltage |
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0 |
5.5 |
V |
Vout |
DC Output Voltage |
VCC = 0 |
0 |
5.5 |
V |
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High or Low State |
0 |
VCC |
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TA |
Operating Temperature |
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± 40 |
+ 85 |
_C |
tr, tf |
Input Rise and Fall Time |
VCC =5.0V ±0.5V |
0 |
20 |
ns/V |
DC ELECTRICAL CHARACTERISTICS
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high±impedance circuit. For proper operation, Vin and Vout should be constrained to the
range GND v (Vin or Vout) v VCC. Unused inputs must always be
tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.
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VCC |
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TA = 25°C |
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TA = ± 40 to 85°C |
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Symbol |
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Parameter |
Test Conditions |
V |
Min |
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Typ |
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Max |
Min |
Max |
Unit |
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VIH |
Minimum High±Level |
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4.5 to |
2.0 |
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2.0 |
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V |
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Input Voltage |
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5.5 |
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VIL |
Maximum Low±Level |
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4.5 to |
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0.8 |
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0.8 |
V |
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Input Voltage |
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5.5 |
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VOH |
Minimum High±Level |
IOH = ± 50μA |
4.5 |
4.4 |
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4.5 |
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4.4 |
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V |
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Output Voltage |
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V |
= V |
IH |
or V |
IL |
IOH = ± 8mA |
4.5 |
3.94 |
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3.80 |
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in |
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VOL |
Maximum Low±Level |
IOL = 50μA |
4.5 |
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0.0 |
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0.1 |
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0.1 |
V |
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Output Voltage |
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V |
= V |
IH |
or V |
IL |
IOL = 8mA |
4.5 |
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0.36 |
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0.44 |
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in |
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Iin |
Maximum Input |
Vin = 5.5 V or GND |
0 to 5.5 |
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± 0.1 |
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± 1.0 |
μA |
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Leakage Current |
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ICC |
Maximum Quiescent |
Vin = VCC or GND |
5.5 |
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2.0 |
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20.0 |
μA |
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Supply Current |
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ICCT |
Quiescent Supply |
Per Input: VIN = 3.4V |
5.5 |
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1.35 |
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1.50 |
mA |
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Current |
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Other Input: VCC or GND |
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IOPD |
Output Leakage |
VOUT = 5.5V |
0 |
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0.5 |
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5.0 |
μA |
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Current |
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MOTOROLA |
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2 |
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VHC Data ± Advanced CMOS Logic |
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DL203 Ð Rev 1 |