Motorola MC14555BCP, MC14556BCL, MC14556BCP, MC14556BD, MC14555BD Datasheet

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Dual Binary to 1-of-4 Decoder/Demultiplexer

The MC14555B and MC14556B are constructed with complementary MOS (CMOS) enhancement mode devices. Each Decoder/Demultiplexer has two select inputs (A and B), an active low Enable input (E), and four mutually exclusive outputs (Q0, Q1, Q2, Q3). The MC14555B has the selected output go to the ªhighº state, and the MC14556B has the selected output go to the ªlowº state. Expanded decoding such as binary±to±hexadecimal (1±of±16), etc., can be achieved by using other MC14555B or MC14556B devices.

Applications include code conversion, address decoding, memory selection control, and demultiplexing (using the Enable input as a data input) in digital data transmission systems.

•Diode Protection on All Inputs

•Active High or Active Low Outputs

•Expandable

•Supply Voltage Range = 3.0 Vdc to 18 Vdc

•All Outputs Buffered

•Capable of Driving Two Low±Power TTL Loads or One Low±Power Schottky TTL Load Over the Rated Temperature Range

MAXIMUM RATINGS* (Voltages Referenced to VSS)

Symbol	Parameter	Value		Unit
VDD	DC Supply Voltage	± 0.5 to +	18.0	V
Vin, Vout	Input or Output Voltage (DC or Transient)	± 0.5 to VDD + 0.5		V
Iin, Iout	Input or Output Current (DC or Transient),	± 10		mA
	per Pin
PD	Power Dissipation, per Package²	500		mW
Tstg	Storage Temperature	± 65 to +	150	_C
TL	Lead Temperature (8±Second Soldering)	260		_C

* Maximum Ratings are those values beyond which damage to the device may occur. ²Temperature Derating:

ªP and D/DWº Packages: ± 7.0 mW/C From 65C To 125_C Ceramic ªLº Packages: ± 12 mW/C From 100_C To 125_C

BLOCK DIAGRAM

		MC14555B						MC14556B
			Q0		4							4
2		A				2		A	Q0
			Q1		5							5
3		B				3		B	Q1
			Q2		6							6
									Q2
1		E				1		E
			Q3		7							7
									Q3

MC14555B

MC14556B

L SUFFIX

CERAMIC

CASE 620

P SUFFIX

PLASTIC

CASE 648

D SUFFIX

SOIC

CASE 751B

ORDERING INFORMATION

MC14XXXBCP	Plastic
MC14XXXBCL	Ceramic
MC14XXXBD	SOIC

TA = ± 55° to 125°C for all packages.

TRUTH TABLE

	Inputs								Outputs
Enable		Select				MC14555B					MC14556B
E		B		A	Q3		Q2	Q1	Q0	Q3		Q2	Q1		Q0
0		0		0	0		0	0	1	1		1		1		0
0		0		1	0		0	1	0	1		1		0		1
0		1		0	0		1	0	0	1		0		1		1
0		1		1	1		0	0	0	0		1		1		1
1		X	X		0		0	0	0	1		1		1		1

X = Don't Care

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high±impedance circuit. For proper operation, Vin and Vout should be constrained

to the range VSS v (Vin or Vout) v VDD. Unused inputs must always be tied to an

appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open.

			Q0		12							12
14		A				14		A	Q0
			Q1		11							11
13		B				13		B	Q1
			Q2		10							10
									Q2
15		E				15		E
			Q3		9							9
									Q3
						VDD = PIN 16
						VSS = PIN 8

REV 3 1/94

Motorola, Inc. 1995

ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS)

			VDD	± 55_C			25_C		125_C
Characteristic		Symbol	Vdc	Min	Max	Min	Typ #	Max	Min	Max	Unit
Output Voltage	ª0º Level	VOL	5.0	Ð	0.05	Ð	0	0.05	Ð	0.05	Vdc
Vin = VDD or 0			10	Ð	0.05	Ð	0	0.05	Ð	0.05
			15	Ð	0.05	Ð	0	0.05	Ð	0.05
	ª1º Level	VOH	5.0	4.95	Ð	4.95	5.0	Ð	4.95	Ð	Vdc
Vin = 0 or VDD			10	9.95	Ð	9.95	10	Ð	9.95	Ð
			15	14.95	Ð	14.95	15	Ð	14.95	Ð
Input Voltage	ª0º Level	VIL									Vdc
(VO = 4.5 or 0.5 Vdc)			5.0	Ð	1.5	Ð	2.25	1.5	Ð	1.5
(VO = 9.0 or 1.0 Vdc)			10	Ð	3.0	Ð	4.50	3.0	Ð	3.0
(VO = 13.5 or 1.5 Vdc)			15	Ð	4.0	Ð	6.75	4.0	Ð	4.0
(VO = 0.5 or 4.5 Vdc)	ª1º Level	VIH	5.0	3.5	Ð	3.5	2.75	Ð	3.5	Ð	Vdc
(VO = 1.0 or 9.0 Vdc)			10	7.0	Ð	7.0	5.50	Ð	7.0	Ð
(VO = 1.5 or 13.5 Vdc)			15	11	Ð	11	8.25	Ð	11	Ð
Output Drive Current		IOH									mAdc
(VOH = 2.5 Vdc)	Source		5.0	± 3.0	Ð	± 2.4	± 4.2	Ð	± 1.7	Ð
(VOH = 4.6 Vdc)			5.0	± 0.64	Ð	± 0.51	± 0.88	Ð	± 0.36	Ð
(VOH = 9.5 Vdc)			10	± 1.6	Ð	± 1.3	± 2.25	Ð	± 0.9	Ð
(VOH = 13.5 Vdc)			15	± 4.2	Ð	± 3.4	± 8.8	Ð	± 2.4	Ð
(VOL = 0.4 Vdc)	Sink	IOL	5.0	0.64	Ð	0.51	0.88	Ð	0.36	Ð	mAdc
(VOL = 0.5 Vdc)			10	1.6	Ð	1.3	2.25	Ð	0.9	Ð
(VOL = 1.5 Vdc)			15	4.2	Ð	3.4	8.8	Ð	2.4	Ð
Input Current		Iin	15	Ð	± 0.1	Ð	± 0.00001	± 0.1	Ð	± 1.0	μAdc
Input Capacitance		Cin	Ð	Ð	Ð	Ð	5.0	7.5	Ð	Ð	pF
(Vin = 0)
Quiescent Current		IDD	5.0	Ð	5.0	Ð	0.005	5.0	Ð	150	μAdc
(Per Package)			10	Ð	10	Ð	0.010	10	Ð	300
			15	Ð	20	Ð	0.015	20	Ð	600
Total Supply Current**²		IT	5.0			IT = (0.85 μA/kHz) f + IDD					μAdc
(Dynamic plus Quiescent,			10			IT = (1.70 μA/kHz) f + IDD
Per Package)			15			IT = (2.60 μA/kHz) f + IDD
(CL = 50 pF on all outputs, all
buffers switching)

#Data labelled ªTypº is not to be used for design purposes but is intended as an indication of the IC's potential performance. ** The formulas given are for the typical characteristics only at 25_C.

²T o calculate total supply current at loads other than 50 pF: IT(CL) = IT(50 pF) + (CL ± 50) Vfk

where: IT is in μA (per package), CL in pF, V = (VDD ± VSS) in volts, f in kHz is input frequency, and k = 0.002.

									PIN ASSIGNMENTS
				MC14555B										MC14556B
							VDD										VDD
				1	16							A		1	16
	E										E
		A
AA				2	15		E	B			AA			2	15		E		B
BA				3	14		AB				BA			3	14		AB
Q0A				4	13		BB							4	13		BB
										Q0A
Q1A				5	12		Q0B							5	12
										Q1A								Q0B
Q2A				6	11		Q1B							6	11
										Q2A								Q1B
Q3A				7	10		Q2B							7	10
										Q3A								Q2B
VSS				8	9		Q3B			VSS				8	9
																		Q3B

MC14555B MC14556B	MOTOROLA CMOS LOGIC DATA
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