MOTOROLA MC14584BFR2, MC14584BCP, MC14584BD, MC14584BDR2, MC14584BDT Datasheet

MC14584B

Hex Schmitt Trigger

The MC14584B Hex Schmitt Trigger is constructed with MOS P±channel and N±channel enhancement mode devices in a single monolithic structure. These devices find primary use where low power dissipation and/or high noise immunity is desired. The MC14584B may be used in place of the MC14069UB hex inverter for enhanced noise immunity to ªsquare upº slowly changing waveforms.

•Supply Voltage Range = 3.0 Vdc to 18 Vdc

•Capable of Driving Two Low±power TTL Loads or One Low±power Schottky TTL Load over the Rated Temperature Range

•Double Diode Protection on All Inputs

•Can Be Used to Replace MC14069UB

•For Greater Hysteresis, Use MC14106B which is Pin±for±Pin Replacement for CD40106B and MM74Cl4

MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 2.)

Symbol	Parameter	Value	Unit
VDD	DC Supply Voltage Range	± 0.5 to +18.0	V
Vin, Vout	Input or Output Voltage Range	± 0.5 to VDD + 0.5	V
	(DC or Transient)
Iin, Iout	Input or Output Current	± 10	mA
	(DC or Transient) per Pin
PD	Power Dissipation,	500	mW
	per Package (Note 3.)
TA	Ambient Temperature Range	± 55 to +125	°C
Tstg	Storage Temperature Range	± 65 to +150	°C
TL	Lead Temperature	260	°C
	(8±Second Soldering)

2.Maximum Ratings are those values beyond which damage to the device may occur.

3.Temperature Derating:

Plastic ªP and D/DWº Packages: ± 7.0 mW/C From 65_C To 125_C

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high±impedance circuit. For proper operation, Vin and Vout should be constrained

to the range VSS v (Vin or Vout) v VDD.

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open.

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		MARKING
		DIAGRAMS
		14
	PDIP±14	MC14584BCP
	P SUFFIX
		AWLYYWW
	CASE 646
		1
		14
	SOIC±14	14584B
	D SUFFIX
		AWLYWW
	CASE 751A
		1
		14
	TSSOP±14	14
	DT SUFFIX	584B
	CASE 948G	ALYW
		1
		14
	SOEIAJ±14	MC14584B
	F SUFFIX
		AWLYWW
	CASE 965
		1
A	= Assembly Location
WL or L = Wafer Lot
YY or Y	= Year
WW or W = Work Week
ORDERING INFORMATION
Device	Package	Shipping
MC14584BCP	PDIP±14	2000/Box
MC14584BD	SOIC±14	55/Rail
MC14584BDR2	SOIC±14	2500/Tape & Reel
MC14584BDT	TSSOP±14	96/Rail
MC14584BDTEL	TSSOP±14	2000/Tape & Reel
MC14584BF	SOEIAJ±14	See Note 1.
MC14584BFEL	SOEIAJ±14	See Note 1.

1. For ordering information on the EIAJ version of the SOIC packages, please contact your local ON Semiconductor representative.

Semiconductor Components Industries, LLC, 2000	1	Publication Order Number:
March, 2000 ± Rev. 3		MC14584B/D

MC14584B

PIN ASSIGNMENT

IN 1	1	14	VDD
OUT 1	2	13	IN 6
IN 2	3	12	OUT 6
OUT 2	4	11	IN 5
IN 3	5	10	OUT 5
OUT 3	6	9	IN 4
VSS	7	8	OUT 4

LOGIC DIAGRAM

1	2
3	4
5	6
9	8
11	10
13	12
	VDD = PIN 14
	VSS = PIN 7

EQIVALENT CIRCUIT SCHEMATIC

(1/6 OF CIRCUIT SHOWN)

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MC14584B

ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS)

			VDD	± 55_C			25_C			125_C
Characteristic		Symbol	Vdc	Min	Max	Min	Typ (4.)	Max		Min	Max	Unit
Output Voltage	ª0º Level	VOL	5.0	Ð	0.05	Ð	0	0.05		Ð	0.05	Vdc
Vin = VDD			10	Ð	0.05	Ð	0	0.05		Ð	0.05
			15	Ð	0.05	Ð	0	0.05		Ð	0.05
Vin = 0	ª1º Level	VOH	5.0	4.95	Ð	4.95	5.0		Ð	4.95	Ð	Vdc
			10	9.95	Ð	9.95	10		Ð	9.95	Ð
			15	14.95	Ð	14.95	15		Ð	14.95	Ð
Output Drive Current		IOH										mAdc
(VOH = 2.5 Vdc)	Source		5.0	± 3.0	Ð	± 2.4	± 4.2		Ð	± 1.7	Ð
(VOH = 4.6 Vdc)			5.0	± 0.64	Ð	± 0.51	± 0.88		Ð	± 0.36	Ð
(VOH = 9.5 Vdc)			10	± 1.6	Ð	± 1.3	± 2.25		Ð	± 0.9	Ð
(VOH = 13.5 Vdc)			15	± 4.2	Ð	± 3.4	± 8.8		Ð	± 2.4	Ð
(VOL = 0.4 Vdc)	Sink	IOL	5.0	0.64	Ð	0.51	0.88		Ð	0.36	Ð	mAdc
(VOL = 0.5 Vdc)			10	1.6	Ð	1.3	2.25		Ð	0.9	Ð
(VOL = 1.5 Vdc)			15	4.2	Ð	3.4	8.8		Ð	2.4	Ð
Input Current		Iin	15	Ð	± 0.1	Ð	± 0.00001	± 0.1		Ð	± 1.0	μAdc
Input Capacitance		Cin	Ð	Ð	Ð	Ð	5.0		7.5	Ð	Ð	pF
(Vin = 0)
Quiescent Current		IDD	5.0	Ð	0.25	Ð	0.0005	0.25		Ð	7.5	μAdc
(Per Package)			10	Ð	0.5	Ð	0.0010		0.5	Ð	15
			15	Ð	1.0	Ð	0.0015		1.0	Ð	30
Total Supply Current (5.) (6.)		I	5.0			I = (1.8 μA/kHz) f + I			DD			μAdc
		T				T
(Dynamic plus Quiescent,			10			IT = (3.6 μA/kHz) f + IDD
Per Package)			15			IT = (5.4 μA/kHz) f + IDD
(CL = 50 pF on all outputs, all
buffers switching)
Hysteresis Voltage		VH (7.)	5.0	0.27	1.0	0.25	0.6		1.0	0.21	1.0	Vdc
			10	0.36	1.3	0.3	0.7		1.2	0.25	1.2
			15	0.77	1.7	0.6	1.1		1.5	0.50	1.4
Threshold Voltage		VT+										Vdc
Positive±Going			5.0	1.9	3.5	1.8	2.7		3.4	1.7	3.4
			10	3.4	7.0	3.3	5.3		6.9	3.2	6.9
			15	5.2	10.6	5.2	8.0	10.5		5.2	10.5
Negative±Going		VT±	5.0	1.6	3.3	1.6	2.1		3.2	1.5	3.2	Vdc
			10	3.0	6.7	3.0	4.6		6.7	3.0	6.7
			15	4.5	9.7	4.6	6.9		9.8	4.7	9.9

4.Data labelled ªTypº is not to be used for design purposes but is intended as an indication of the IC's potential performance.

5.The formulas given are for the typical characteristics only at 25_C.

6.To calculate total supply current at loads other than 50 pF:

IT(CL) = IT(50 pF) + (CL ± 50) Vfk

where: IT is in μA (per package), CL in pF, V = (VDD ± VSS) in volts, f in kHz is input frequency, and k = 0.001. 7. VH = VT+ ± VT± (But maximum variation of VH is specified as less than VT + max ± VT ± min).

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