Motorola MC14598BCP, MC14597BDW, MC14598BCL, MC14597BCL, MC14597BCP Datasheet

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

MC14599

See Page 6-174

MC14597B

MC14598B

8-Bit Bus-Compatible Latches

The MC14597B and MC14598B are 8±bit latches, one addressed with an

internal counter and the other addressed with an external binary address.

The 8 latch±outputs are high drive, three±state and bus line compatible. The

L SUFFIX

drive capability allows direct applications with MPU systems such as the

CERAMIC

Motorola 6800 family.

CASE 620

With MC14597B, a 3±bit address counter (clocked on the falling edge of

Increment) selects the appropriate latch. The latches of the MC14598B are

accessed via the Address pins, A0, A1, and A2. A Full Flag is provided on

P SUFFIX

the MC14597B to indicate the position of the Address counter.

PLASTIC

All 8 outputs from the latches are available in parallel when Enable is in the

CASE 648

low state. Data is entered into a selected latch from the Data pin when the

Strobe is high. Master reset is available on both parts.

• Serial Data Input

D SUFFIX

• Three±State Bus Compatible Parallel Outputs

SOIC

• Three±State Control Pin (Enable) TTL Compatible Input

CASE 751B

• Open Drain Full Flag (Multiple Latch Wire±O Ring)

ORDERING INFORMATION

• Master Reset

MC14597BCP

Plastic

• Level Shifting Inputs on All Except Enable

• Diode Protection Ð All Inputs

MC14597BCL

Ceramic

MC14597BDW

SOIC

• Supply Voltage Range Ð 3.0 Vdc to 18 Vdc

TA = ± 55° to 125°C for all packages.

• Capable of Driving TTL Over Rated Temperature Range

With Fanout as Follows:

1 TTL Load

4 LSTTL Loads

L SUFFIX

CERAMIC

MC14597B

BLOCK DIAGRAMS

CASE 726

RESET 2

4

ENABLE

RESET

P SUFFIX

LOGIC

D0

1

16

VDD

PLASTIC

RESET

2

15

D1

CASE 707

DATA

3

1

D0

DATA

3

14

D2

ORDERING INFORMATION

STROBE

6

15

D1

THREE

14

D2

ENABLE

4

13

D3

MC14598BCP

Plastic

3±BIT

ADDRESS

13

D3

ADDRESS

8

STATE

12

D4

FULL

5

12

D4

MC14598BCL

Ceramic

DECODER

LATCHES

OUTPUT

COUNTER

11

D5

TA = ± 55° to 125°C for all packages.

BUFFERS

10

D6

STROBE

6

11

D5

7

9

D7

INCREMENT

FULL

INCREMENT

7

10

D6

VDD = 16

VSS

8

9

D7

LOGIC

VSS = 8

5

D0

1

18

VDD

FULL

MC14598B

RESET

2

17

D1

OUTPUT

DATA

3

16

D2

ENABLE

4

TRUTH TABLE

ENABLE

4

15

D3

RESET

2

Enable

Outputs

DATA

3

1

D0

NC

5

14

D4

STROBE

6

THREE

17

D1

1

High Impedance

STROBE

6

13

D5

16

D2

A0

7

8

STATE

15

D3

0

Dn

A1

8

ADDRESS

LATCHES

OUTPUT

A0

7

12

D6

14

D4

A2

10

DECODER

BUFFERS

13

D5

Dn = State of nth latch

A1

8

11

D7

12

D6

VDD = 18

11

D7

VSS

9

10

A2

VSS = 9

NC = NO CONNECTION

REV 3 1/94

Motorola, Inc. 1995

MAXIMUM RATINGS* (Voltages Referenced to VSS)

Symbol	Parameter	Value	Unit
VDD	DC Supply Voltage	± 0.5 to + 18.0	V
Vin	Input Voltage, Enable (DC or Transient)	± 0.5 to VDD + 0.5	V
Vin	Input Voltage, All other Inputs	± 0.5 to VDD + 12	V
	(DC or Transient)
Vout	Output Voltage (DC or Transient)	± 0.5 to VDD + 0.5	V
Iin, lout	Input or Output Current (DC or Transient),	± 10	mA
	per Pin
PD	Power Dissipation, per Package²	500	mW
Tstg	Storage Temperature	± 65 to + 150	_C
TL	Lead Temperature (8±Second Soldering)	260	_C

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high±impedance circuit. For proper operation, Vin and Vout should be constrained

to the range VSS v (Vin or Vout) v VDD. Unused inputs must always be tied to an

appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open.

* Maximum Ratings are those values beyond which damage to the device may occur. ²Temperature Derating:

ªP and D/DWº Packages: ± 7.0 mW/C From 65C To 125_C Ceramic ªLº Packages: ± 12 mW/C From 100_C To 125_C

ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS)

VDD

± 55_C

25_C

125_C

Characteristic

Symbol

Vdc

Min

Max

Min

Typ #

Max

Min

Max

Unit

Output Voltage

ª0º Level

VOL

5.0

Ð

0.05

Ð

0

0.05

Ð

0.05

Vdc

Vin = VDD or 0

10

Ð

0.05

Ð

0

0.05

Ð

0.05

15

Ð

0.05

Ð

0

0.05

Ð

0.05

ª1º Level

VOH

5.0

4.95

Ð

4.95

5.0

Ð

4.95

Ð

Vdc

Vin = 0 or VDD

10

9.95

Ð

9.95

10

Ð

9.95

Ð

15

14.95

Ð

14.95

15

Ð

14.95

Ð

Input Voltage** Ð

ª0º Level

VIL

Vdc

Enable

(VO = 4.5 or 0.5 Vdc)

5.0

Ð

0.8

Ð

1.1

0.8

Ð

0.8

(VO = 9.0 or 1.0 Vdc)

10

Ð

1.6

Ð

2.2

1.6

Ð

1.6

(VO = 13.5 or 1.5 Vdc)

15

Ð

2.4

Ð

3.4

2.4

Ð

2.4

(VO = 0.5 or 4.5 Vdc)

ª1º Level

VIH

5.0

2.0

Ð

2.0

1.9

Ð

2.0

Ð

Vdc

(VO = 1.0 or 9.0 Vdc)

10

6.0

Ð

6.0

3.1

Ð

6.0

Ð

(VO = 1.5 or 13.5 Vdc)

15

10

Ð

10

4.3

Ð

10

Ð

Input Voltage

ª0º Level

VIL

Vdc

Other Inputs

(VO = 4.5 or 0.5 Vdc)

5.0

Ð

1.5

Ð

2.25

1.5

Ð

1.5

(VO = 9.0 or 1.0 Vdc)

10

Ð

3.0

Ð

4.50

3.0

Ð

3.0

(VO = 13.5 or 1.5 Vdc)

15

Ð

4.0

Ð

6.75

4.0

Ð

4.0

(VO = 0.5 or 4.5 Vdc)

ª1º Level

VIH

5.0

3.5

Ð

3.5

2.75

Ð

3.5

Ð

Vdc

(VO = 1.0 or 9.0 Vdc)

10

7.0

Ð

7.0

5.50

Ð

7.0

Ð

(VO = 1.5 or 13.5 Vdc)

15

11

Ð

11

8.25

Ð

11

Ð

Output Drive Current

Source

IOH

mAdc

(Full Ð Sink Only)

(VOH = 4.6 Vdc)

5.0

± 1.0

±

± 1.0

± 2.0

Ð

± 1.0

Ð

(VOH = 9.5 Vdc)

10

Ð

Ð

Ð

± 6.0

Ð

Ð

Ð

(VOH = 13.5 Vdc)

1 5

Ð

Ð

Ð

± 12

Ð

Ð

Ð

(VOL = 0.4 Vdc)

Sink

IOL

5.0

1.6

Ð

1.6

3.2

Ð

1.6

Ð

mAdc

(VOL = 0.5 Vdc)

10

Ð

Ð

Ð

6.0

Ð

Ð

Ð

(VOL = 1.5 Vdc)

15

Ð

Ð

Ð

12

Ð

Ð

Ð

Input Current

Iin

15

Ð

± 0.1

Ð

± 0.00001

± 0.1

Ð

± 1.0

μAdc

Three±State Leakage Current

ITL

15

Ð

± 0.1

Ð

± 0.00001

± 0.1

Ð

± 3.0

μAdc

Input Capacitance (Vin = 0)

Cin

Ð

Ð

Ð

Ð

5.0

7.5

Ð

Ð

pF

Quiescent Current

IDD

5.0

Ð

5.0

Ð

0.005

5.0

Ð

150

μAdc

(Per Package)

10

Ð

10

Ð

0.010

10

Ð

300

15

Ð

20

Ð

0.015

20

Ð

600

**Total Supply Current at an

IT

5.0

IT = (2.0 μA/kHz) f + IDD

μAdc

**External Load Capacitance of

10

IT = (4.0 μA/kHz) f + IDD

**130 pF

IT = (6.0 μA/kHz) f + IDD

²Data labelled ªTypº is not to be used for design purposes but is intended as an indication of the IC's potential performance. ** The formulas given are for the typical characteristics only at 25_C.

MC14597B MC14598B	MOTOROLA CMOS LOGIC DATA
2

SWITCHING CHARACTERISTICS* (TA = 25_C, CL = 130 pF + 1 TTL Load)

									VDD		All Types
							Characteristic	Symbol	Vdc	Min	Typ #	Max	Unit
	Output Rise and Fall Time							tTLH,					ns
		tTLH, tTHL = (0.5 ns/pF) CL + 35 ns						tTHL	5.0	Ð	100	200
		tTLH, tTHL = (0.2 ns/pF) CL + 25 ns							10	Ð	50	100
		tTLH, tTHL = (0.16 ns/pF) CL + 20 ns							15	Ð	40	80
	Propagation Delay Time							tPLH,					ns
		Enable			to Output			tPHL	5.0	Ð	160	320
									10	Ð	125	250
									15	Ð	100	200
		Strobe to Output							5.0	Ð	200	400
									10	Ð	100	200
									15	Ð	80	160
		Strobe to					(MC14597B only)		5.0	Ð	200	400
						Full
									10	Ð	100	200
									15	Ð	80	160
				to Output					5.0	Ð	175	350
		Reset
									10	Ð	90	180
									15	Ð	70	140
	Pulse Width							tWH,					ns
		Enable						tWL	5.0	320	160	Ð
									10	240	120	Ð
									15	160	80	Ð
		Strobe							5.0	200	100	Ð
									10	100	50	Ð
									15	80	40	Ð
		Increment (MC14597B only)							5.0	200	100	Ð
									10	100	50	Ð
									15	80	40	Ð
									5.0	300	150	Ð
		Reset
									10	160	80	Ð
									15	100	50	Ð
	Setup Time							tsu					ns
		Data							5.0	100	50	Ð
									10	50	25	Ð
									15	35	20	Ð
		Address (MC14598B only)							5.0	200	100	Ð
									10	100	50	Ð
									15	70	35	Ð
		Increment (MC14597B only)							5.0	400	200	Ð
									10	200	100	Ð
									15	170	85	Ð
	Hold Time							th					ns
		Data							5.0	100	50	Ð
									10	50	25	Ð
									15	35	20	Ð
		Address (MC14598B only)							5.0	100	50	Ð
									10	50	25	Ð
									15	35	20	Ð
			Removal Time					trem	5.0	20	± 25	Ð	ns
	Reset
									10	20	± 15	Ð
									15	20	± 10	Ð

* The formulas given are for the typical characteristics only at 25_C.

#Data labelled ªTypº is not to be used for design purposes but is intended as an indication of the IC's potential performance.

MOTOROLA CMOS LOGIC DATA	MC14597B MC14598B
	3