MOTOROLA MC14532BD, MC14532BDR2, MC14532BF, MC14532BFEL, MC14532BFR1 Datasheet

 Semiconductor Components Industries, LLC, 2000

March, 2000 – Rev. 3

1 Publication Order Number:

MC14532B/D

MC14532B

8-Bit Priority Encoder

The MC14532B is constructed with complementary MOS (CMOS)
enhancement mode devices. The primary function of a priority
encoder is to provide a binary address for the active input with the
highest priority. Eight data inputs (D0 thru D7) and an enable input
(E

in)

are provided. Five outputs are available, three are address outputs

(Q0 thru Q2), one group select (GS) and one enable output (E

out

).

• Diode Protection on All Inputs

• Supply Voltage Range = 3.0 Vdc to 18 Vdc

• Capable of Driving Two Low–power TTL Loads or One Low–Power

Schottky TTL Load over the Rated Temperature Range

MAXIMUM RATINGS (Voltages Referenced to V

SS

) (Note 2.)

Symbol Parameter Value Unit

V

DD

DC Supply Voltage Range –0.5 to +18.0 V

Vin, V

out

Input or Output Voltage Range

(DC or Transient)

–0.5 to VDD + 0.5 V

Iin, I

out

Input or Output Current

(DC or Transient) per Pin

±10 mA

P

D

Power Dissipation,

per Package (Note 3.)

500 mW

T

A

Ambient Temperature Range –55 to +125 °C

T

stg

Storage Temperature Range –65 to +150 °C

T

L

Lead Temperature

(8–Second Soldering)

260 °C

2. Maximum Ratings are those values beyond which damage to the device

may occur.

3. Temperature Derating:

Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C T o 125_C

This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedance circuit. For proper operation, V

in

and V

out

should be constrained

to the range V

SS

v (Vin or V

out

) v VDD.

Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V

SS

or VDD). Unused outputs must be left open.

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A = Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week

Device Package Shipping

ORDERING INFORMATION

MC14532BCP PDIP–16 2000/Box
MC14532BD SOIC–16 48/Rail
MC14532BDR2 SOIC–16 2500/Tape & Reel

1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.

MARKING

DIAGRAMS

1

16

PDIP–16

P SUFFIX

CASE 648

MC14532BCP

AWLYYWW

SOIC–16

D SUFFIX

CASE 751B

1

16

14532B

AWLYWW

SOEIAJ–16

F SUFFIX

CASE 966

1

16

MC14532B

AWLYWW

MC14532BFEL SOEIAJ–16 See Note 1.

MC14532BF SOEIAJ–16 See Note 1.

MC14532BFR1 SOEIAJ–16 See Note 1.

MC14532B

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2

PIN ASSIGNMENT

13

14

15

16

9

10

11

125

4

3

2

1

8

7

6

D2

D3

GS

E

out

V

DD

Q0

D0

D1

D7

D6

D5

D4

V

SS

Q1

Q2

E

in

TRUTH TABLE

Input Output

EinD7 D6 D5 D4 D3 D2 D1 D0 GS Q2 Q1 Q0 E

out

0 X X X X X X X X 0 0 0 0 0
1 0 0 0 0 0 0 0 0 0 0 0 0 1

1 1 X X X X X X X 1 1 1 1 0
1 0 1 X X X X X X 1 1 1 0 0
1 0 0 1 X X X X X 1 1 0 1 0
1 0 0 0 1 X X X X 1 1 0 0 0

1 0 0 0 0 1 X X X 1 0 1 1 0
1 0 0 0 0 0 1 X X 1 0 1 0 0
1 0 0 0 0 0 0 1 X 1 0 0 1 0
1 0 0 0 0 0 0 0 1 1 0 0 0 0

X = Don’t Care

MC14532B

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3

ELECTRICAL CHARACTERISTICS (Voltages Referenced to V

SS

)

V

– 55_C 25_C 125_C

Characteristic Symbol

V

DD

Vdc

Min Max Min Typ

(4.)

Max Min Max

Unit

Output Voltage “0” Level

V

in

= VDD or 0

V

OL

5.0
10
15

—
—
—

0.05

0.05

0.05

—
—
—

0
0
0

0.05

0.05

0.05

—
—
—

0.05

0.05

0.05

Vdc

“1” Level

V

in

= 0 or V

DD

V

OH

5.0
10
15

4.95

9.95

14.95

—
—
—

4.95

9.95

14.95

5.0
10
15

—
—
—

4.95

9.95

14.95

—
—
—

Vdc

Input Voltage “0” Level

(V

O

= 4.5 or 0.5 Vdc)

(V

O

= 9.0 or 1.0 Vdc)

(V

O

= 13.5 or 1.5 Vdc)

V

IL

5.0
10
15

—
—
—

1.5

3.0

4.0

—
—
—

2.25

4.50

6.75

1.5

3.0

4.0

—
—
—

1.5

3.0

4.0

Vdc

“1” Level

(V

O

= 0.5 or 4.5 Vdc)

(V

O

= 1.0 or 9.0 Vdc)

(V

O

= 1.5 or 13.5 Vdc)

V

IH

5.0
10
15

3.5

7.0
11

—
—
—

3.5

7.0
11

2.75

5.50

8.25

—
—
—

3.5

7.0
11

—
—
—

Vdc

Output Drive Current

(V

OH

= 2.5 Vdc) Source

(V

OH

= 4.6 Vdc)

(V

OH

= 9.5 Vdc)

(V

OH

= 13.5 Vdc)

I

OH

5.0

5.0
10
15

– 3.0

– 0.64

– 1.6
– 4.2

—
—
—
—

– 2.4

– 0.51

– 1.3
– 3.4

– 4.2
– 0.88
– 2.25

– 8.8

—
—
—
—

– 1.7

– 0.36

– 0.9
– 2.4

—
—
—
—

mAdc

(VOL = 0.4 Vdc) Sink
(V

OL

= 0.5 Vdc)

(V

OL

= 1.5 Vdc)

I

OL

5.0
10
15

0.64

1.6

4.2

—
—
—

0.51

1.3

3.4

0.88

2.25

8.8

—
—
—

0.36

0.9

2.4

—
—
—

mAdc

Input Current I

in

15 — ± 0.1 — ±0.00001 ± 0.1 — ± 1.0 µAdc

Input Capacitance

(V

in

= 0)

C

in

— — — — 5.0 7.5 — — pF

Quiescent Current

(Per Package)

I

DD

5.0
10
15

—
—
—

5.0
10
20

—
—
—

0.005

0.010

0.015

5.0
10
20

—
—
—

150
300
600

µAdc

Total Supply Current

(5.) (6.)

(Dynamic plus Quiescent,
Per Package)
(C

L

= 50 pF on all outputs, all

buffers switching)

I

T

5.0
10
15

IT = (1.74 µA/kHz) f + I

DD

IT = (3.65 µA/kHz) f + I

DD

IT = (5.73 µA/kHz) f + I

DD

µAdc

4. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

5. The formulas given are for the typical characteristics only at 25_C.

6. To calculate total supply current at loads other than 50 pF:
I

T(CL

) = IT(50 pF) + (CL – 50) Vfk

where: I

T

is in µA (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.005.

MC14532B

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4

SWITCHING CHARACTERISTICS

(7.)

(C

L

= 50 pF, T

A

= 25_C)

Characteristic

Symbol V

DD

Min Typ

(8.)

Max Unit

Output Rise and Fall Time

t

TLH

, t

THL

= (1.5 ns/pF) CL + 25 ns

t

TLH

, t

THL

= (0.75 ns/pF) CL + 12.5 ns

t

TLH

, t

THL

= (0.55 ns/pF) CL + 9.5 ns

t

TLH

,

t

THL

5.0
10
15

—
—
—

100

50
40

200
100

80

ns

Propagation Delay Time — Ein to E

out

t

PLH

, t

PHL

= (1.7 ns/pF) CL + 120 ns

t

PLH

, t

PHL

= (0.66 ns/pF) CL + 77 ns

t

PLH

, t

PHL

= (0.5 ns/pF) CL + 55 ns

t

PLH

,

t

PHL

5.0
10
15

—
—
—

205
110

80

410
220
160

ns

Propagation Delay Time — Ein to GS

t

PLH

, t

PHL

= (1.7 ns/pF) CL + 90 ns

t

PLH

, t

PHL

= (0.66 ns/pF) CL 57 ns

t

PLH

, t

PHL

= (0.5 ns/pF) CL + 40 ns

t

PLH

,

t

PHL

5.0
10
15

—
—
—

175

90
65

350
180
130

ns

Propagation Delay Time — Ein to Q

n

t

PLH

, t

PHL

= (1.7 ns/pF) CL + 195 ns

t

PLH

, t

PHL

= (0.66 ns/pF) CL + 107 ns

t

PLH

, t

PHL

= (0.5 ns/pF) CL + 75 ns

t

PHL

,

t

PLH

5.0
10
15

—
—
—

280
140
100

560
280
200

ns

Propagation Delay Time — Dn to Q

n

t

PLH

, t

PHL

= (1.7 ns/pF) CL + 265 ns

t

PLH

, t

PHL

= (0.66 ns/pF) CL + 137 ns

t

PLH

, t

PHL

= (0.5 ns/pF) CL + 85 ns

t

PLH

,

t

PHL

5.0
10
15

—
—
—

300
170
110

600
340
220

ns

Propagation Delay Time — Dn to GS

t

PLH

, t

PHL

= (1.7 ns/pF) CL + 195 ns

t

PLH

, t

PHL

= (0.66 ns/pF) CL + 107 ns

t

PLH

, t

PHL

= (0.5 ns/pF) CL + 75 ns

t

PLH

,

t

PHL

5.0
10
15

—
—
—

280
140
100

560
280
200

ns

7. The formulas given are for the typical characteristics only at 25_C.

8. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

Output

Under

VGS = V

DD

VDS = V

out

Sink Current

VGS = – V

DD

VDS = V

out

– V

DD

Source Current

Under

Test

D0 thru D7 EinD0 thru D6 D7 E

in

E

out

X 0 0 0 1

out

Q0 X 0 0 1 1
Q1

X

0

0

1

1

Q2

X

0

0

1

1

GSX001

1

Figure 1. Typical Sink and Source

Current Characteristics

Figure 2. Typical Power Dissipation Test Circuit

SWITCH
MATRIX

EXTERNAL

POWER
SUPPLY

I

D

E

in

D0
D1

D2
D3
D4
D5
D6
D7

GS

Q2

Q1

Q0

E

out

V

out

PULSE

GENERATOR

(f

o

)

E

in

D0
D1

D2
D3
D4
D5
D6
D7

V

SS

V

DD

I

D

C

L

C

L

C

L

C

L

C

L

GS

Q2

Q1

Q0

E

out

0.01 µF

500 µF