© 2000 Fairchild Semiconductor Corporation DS006214 www.fairchildsemi.com
April 1984
Revised April 2000
DM74ALS251 3-STATE 1-of-8 Line Data Selector/Multiplexer
DM74ALS251
3-STATE 1-of-8 Line Data Selector/Multiplexer
General Description
This Data Selector/Mu ltiplexer con tains full on- chip decod-
ing to select one-of-eight data sources as a result of a
unique three-bit binary code at the Select inputs. Two com-
plementary outputs pro vide both inverting and no n-invert-
ing buffer operation. An Out put Control input is provided
which, when at the high level, p laces both outputs in the
high impedance OFF-State. In order to prevent bus access
conflicts, output disable times are shorter than output
enable times. The Select in put buffers incorpor ate internal
overlap features to ensure that select input changes do not
cause invalid output transients.
Features
■ Advanced oxide-isolated, ion-implanted Schottky TTL
process
■ Switching perform ance is guarant eed over full tem pera-
ture and V
CC
supply range
■ Pin and functional compatible with LS family counterpart
■ Improved output transient handling capability
■ Output control circuit ry incorporates po wer-up 3-STATE
feature
Ordering Code:
Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering code.
Connection Diagram Function Table
H = HIGH Level
L = LOW Level
X = Don't Care
Z = High Impedance (OFF)
D0 thru D7 = The Level of th e R es pective D Input
Order Number Package Number Package Description
DM74ALS251M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM74ALS251SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74ALS251N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs Outputs
Select Strobe
CBA S
YW
XXX H Z Z
LLL L D
0
D
0
LLH L D
1
D
1
LHL L D
2
D
2
LHH L D
3
D
3
HLL L D
4
D
4
HLH L D
5
D
5
HHL L D
6
D
6
HHH L D
7
D
7