Texas Instruments CD4049UBPWR, CD4049UBPW, CD4049UBNSR, CD4049UBNS, CD4050BPWR Datasheet

CD4049UB, CD4050B

Data sheet acquired from Harris Semiconductor SCHS046A

August 1998 - Revised May 1999

[ /Title (CD40 49UB, CD405 0B)

/Subject (CMO S Hex Buffer/ Converters) /Autho r () /Keywords (Harris Semicon- ductor, CD400 0, metal gate, CMOS

CMOS Hex Buffer/Converters

Features

The CD4049UB and CD4050B devices are inverting and non-inverting hex buffers, respectively, and feature logiclevel conversion using only one supply voltage (VCC). The input-signal high level (VIH) can exceed the VCC supply voltage when these devices are used for logic-level conversions. These devices are intended for use as CMOS to DTL/TTL converters and can drive directly two DTL/TTL loads. (VCC = 5V, VOL £ 0.4V, and IOL ³ 3.3mA.)

The CD4049UB and CD4050B are designated as replacements for CD4009UB and CD4010B, respectively. Because the CD4049UB and CD4050B require only one power supply, they are preferred over the CD4009UB and CD4010B and should be used in place of the CD4009UB and CD4010B in all inverter, current driver, or logic-level conversion applications. In these applications the CD4049UB and CD4050B are pin compatible with the CD4009UB and CD4010B respectively, and can be substituted for these devices in existing as well as in new designs. Terminal No. 16 is not connected internally on the CD4049UB or CD4050B, therefore, connection to this terminal is of no consequence to circuit operation. For applications not requiring high sink-current or voltage conversion, the CD4069UB Hex Inverter is recommended.

•CD4049UB Inverting

•CD4050B Non-Inverting

•High Sink Current for Driving 2 TTL Loads

•High-To-Low Level Logic Conversion

•100% Tested for Quiescent Current at 20V

•Maximum Input Current of 1mA at 18V Over Full Package Temperature Range; 100nA at 18V and 25oC

•5V, 10V and 15V Parametric Ratings

Applications

•CMOS to DTL/TTL Hex Converter

•CMOS Current “Sink” or “Source” Driver

•CMOS High-To-Low Logic Level Converter

Ordering Information

	TEMP.		PKG.
PART NUMBER	RANGE (oC)	PACKAGE	NO.
CD4049UBE	-55 to 125	16 Ld PDIP	E16.3
CD4050BE	-55 to 125	16 Ld PDIP	E16.3
CD4049UBF	-55 to 125	16 Ld CERDIP	F16.3
CD4050BF	-55 to 125	16 Ld CERDIP	F16.3
CD4050BM	-55 to 125	16 Ld SOIC	M16.3

NOTE: Wafer and die for this part number is available which meets all electrical specifications. Please contact your local sales office or customer service for ordering information.

Pinouts

CD4049UB (PDIP, CERDIP)	CD4050B (PDIP, CERDIP, SOIC)
TOP VIEW	TOP VIEW

VCC	1	16	NC
G = A	2	15	L = F
A	3	14	F
H = B	4	13	NC
B	5	12	K = E
I = C	6	11	E
C	7	10	J = D
VSS	8	9	D

VCC	1	16	NC
G = A	2	15	L = F
A	3	14	F
H = B	4	13	NC
B	5	12	K = E
I = C	6	11	E
C	7	10	J = D
VSS	8	9	D

1	CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
	Copyright © 1999, Texas Instruments Incorporated

CD4049UB, CD4050B

Functional Block Diagrams

CD4049UB		CD4050B
3	2	3	2
A	G = A	A	G = A
5	4	5	4
B	H = B	B	H = B
7	6	7	6
C	I = C	C	I = C
9	10	9	10
D	J = D	D	J = D
11	12	11	12
E	K = E	E	K = E
14	15	14	15
F	L = F	F	L = F
1		1
VCC		VCC
8		8
VSS		VSS
NC = 13		NC = 13
NC = 16		NC = 16

Schematic Diagrams

	VCC
	P
R	OUT
IN
	N
	VSS

FIGURE 1A. SCHEMATIC DIAGRAM OF CD4049UB, 1 OF 6 IDENTICAL UNITS

VCC

P	P
R
IN	OUT
N	N

VSS

FIGURE 1B. SCHEMATIC DIAGRAM OF CD4050B, 1 OF 6 IDENTICAL UNITS

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CD4049UB, CD4050B

Absolute Maximum Ratings

Supply Voltage (V+ to V-). . . . . . . . . . . . . . . . . . . . . . . -0.5V to 20V DC Input Current, Any One Input. . . . . . . . . . . . . . . . . . . . . . ±10mA

Operating Conditions

Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC

Thermal Information

Thermal Resistance (Typical, Note 1)	θJA (oC/W) θJC (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . .	90	N/A
CERDIP Package. . . . . . . . . . . . . . . . .	130	55
SOIC Package . . . . . . . . . . . . . . . . . . .	100	N/A
Maximum Junction Temperature (Plastic Package)		. . . . . . . .150oC
Maximum Storage Temperature Range . . .	. . . . . . .	-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . .		. . . . . . .265oC

(SOIC - Lead Tips Only)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1. θJA is measured with the component mounted on an evaluation PC board in free air.

DC Electrical Specifications

					LIMITS AT INDICATED TEMPERATURE (oC)
	TEST CONDITIONS									25
	VO	VIN
PARAMETER	(V)	(V)	VCC (V)	-55		-40	85	125	MIN	TYP		MAX	UNITS
Quiescent Device Current	-	0,5	5	1		1	30	30	-	0.02		1	μA
IDD (Max)
	-	0,10	10	2		2	60	60	-	0.02		2	μA
	-	0,15	15	4		4	120	120	-	0.02		4	μA
	-	0,20	20	20		20	600	600	-	0.04		20	μA
Output Low (Sink) Current	0.4	0,5	4.5	3.3		3.1	2.1	1.8	2.6	5.2		-	mA
IOL (Min)
	0.4	0,5	5	4		3.8	2.9	2.4	3.2	6.4		-	mA
	0.5	0,10	10	10		9.6	6.6	5.6	8	16		-	mA
	1.5	0,15	15	26		25	20	18	24	48		-	mA
Output High (Source) Current	4.6	0,5	5	-0.81		-0.73	-0.58	-0.48	-0.65	-1.2		-	mA
IOH (Min)
	2.5	0,5	5	-2.6		-2.4	-1.9	-1.55	-2.1	-3.9		-	mA
	9.5	0,10	10	-2.0		-1.8	-1.35	-1.18	-1.65	-3.0		-	mA
	13.5	0,15	15	-5.2		-4.8	-3.5	-3.1	-4.3	-8.0		-	mA
Out Voltage Low Level	-	0,5	5	0.05		0.05	0.05	0.05	-	0		0.05	V
VOL (Max)
	-	0,10	10	0.05		0.05	0.05	0.05	-	0		0.05	V
	-	0,15	5	0.05		0.05	0.05	0.05	-	0		0.05	V
Output Voltage High Level	-	0,5	5	4.95		4.95	4.95	4.95	4.95	5		-	V
VOH (Min)
	-	0,10	10	9.95		9.95	9.95	9.95	9.95	10		-	V
	-	0,15	15	14.95		14.95	14.95	14.95	14.95	15		-	V
Input Low Voltage, VIL (Max)	4.5	-	5	1		1	1	1	-	-		1	V
CD4049UB
	9	-	10	2		2	2	2	-	-		2	V
	13.5	-	15	2.5		2.5	2.5	2.5	-	-		2.5	V
Input Low Voltage, VIL (Max)	0.5	-	5	1.5		1.5	1.5	1.5	-	-		1.5	V
CD4050B
	1	-	10	3		3	3	3	-	-		3	V
	1.5	-	15	4		4	4	4	-	-		4	V
Input High Voltage, VIH Min	0.5	-	5	4		4	4	4	4	-		-	V
CD4049UB
	1	-	10	8		8	8	8	8	-		-	V
	1.5	-	15	12.5		12.5	12.5	12.5	12.5	-		-	V

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CD4049UB, CD4050B

DC Electrical Specifications	(Continued)
					LIMITS AT INDICATED TEMPERATURE (oC)
	TEST CONDITIONS									25
PARAMETER	VO	VIN
	(V)	(V)	VCC (V)	-55		-40	85	125	MIN	TYP		MAX	UNITS
Input High Voltage, VIH Min	4.5	-	5	3.5		3.5	3.5	3.5	3.5	-		-	V
CD4050B
	9	-	10	7		7	7	7	7	-		-	V
	13.5	-	15	11		11	11	11	11	-		-	V
Input Current, IIN Max	-	0,18	18	±0.1		±0.1	±1	±1	-	±10-5		±0.1	μA

AC Electrical Specifications	T	= 25oC, Input t		, t = 20ns, C		L	= 50pF, R	L	= 200kΩ
	A		r	f
			TEST CONDITIONS							LIMITS (ALL PACKAGES)
PARAMETER			VIN				VCC			TYP	MAX	UNITS
Propagation Delay Time			5				5			60	120	ns
Low to High, tPLH
			10				10			32	65	ns
CD4049UB
			10				5			45	90	ns
			15				15			25	50	ns
			15				5			45	90	ns
Propagation Delay Time			5				5			70	140	ns
Low to High, tPLH
			10				10			40	80	ns
CD4050B
			10				5			45	90	ns
			15				15			30	60	ns
			15				5			40	80	ns
Propagation Delay Time			5				5			32	65	ns
High to Low, tPHL
			10				10			20	40	ns
CD4049UB
			10				5			15	30	ns
			15				15			15	30	ns
			15				5			10	20	ns
Propagation Delay Time			5				5			55	110	ns
High to Low, tPHL
			10				10			22	55	ns
CD4050B
			10				5			50	100	ns
			15				15			15	30	ns
			15				5			50	100	ns
Transition Time, Low to High, tTLH			5				5			80	160	ns
			10				10			40	80	ns
			15				15			30	60	ns
Transition Time, High to Low, tTHL			5				5			30	60	ns
			10				10			20	40	ns
			15				15			15	30	ns
Input Capacitance, CIN			-				-			15	22.5	pF
CD4049UB
Input Capacitance, CIN			-				-			5	7.5	pF
CD4050B

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