Siemens HYS64V2200GU-10, HYS64V2200GU-8, HYS64V2200GU-8-3, HYS64V4220GU-8, HYS72V2200GU-10 Datasheet

3.3V	2M x 64/72-Bit 1 BANK SDRAM Module	HYS64/72V2200GU-8/-10
3.3V	4M x 64/72-Bit 2 BANK SDRAM Module	HYS64/72V4220GU-8/-10

168 pin unbuffered DIMM Modules

• 168 Pin PC100 and PC66 compatible unbuffered 8 Byte Dual-In-Line SDRAM Modules for PC main memory applications

• 1 bank 2M x 64, 2M x 72 and 2 bank 4M x 64, 4M x 72 organisation

• Optimized for byte-write non-parity or ECC applications

• JEDEC standard Synchronous DRAMs (SDRAM)

• Fully PC board layout compatible to INTEL’s Rev. 1.0 module specification

•	SDRAM Performance:
								-8	-8-3	-10		Units
		fCK	Clock frequency (max.)					100	100	66		MHz
		tAC	Clock access time					6	6	8		ns
•	Programmed Latencies :
		Product Speed				CL		tRCD	tRP
	-8			PC100		2		2	2
	-8-3			PC100		3		2	3
	-10			PC66		2		2	2

•Single +3.3V(± 0.3V ) power supply

•Programmable CAS Latency, Burst Length and Wrap Sequence (Sequential & Interleave)

•Auto Refresh (CBR) and Self Refresh

•Decoupling capacitors mounted on substrate

•All inputs, outputs are LVTTL compatible

•Serial Presence Detect with E2PROM

•Utilizes 2M x 8 SDRAMs in TSOPII-44 packages

•4096 refresh cycles every 64 ms

•133,35 mm x 31.75 mm x 4,00 mm card size with gold contact pads

Semiconductor Group

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6.98

HYS64(72)V2200/4220GU-8/-10

SDRAM-Modules

The HYS64(72)2200 and HYS64(72)4220 are industry standard 168-pin 8-byte Dual in-line Memory Modules (DIMMs) which are organised as 2M x 64, 2M x 72 in 1 bank and 4M x 64 and 4M x 72 in two banks high speed memory arrays designed with Synchronous DRAMs (SDRAMs) for non-parity and ECC applications. The DIMMs use -8 speed sort 2M x 8 SDRAM devices in TSOP44 packages to meet the PC100 requirement. Modules which use -10 parts are suitable for PC66 applications only. Decoupling capacitors are mounted on the PC board. The PC board design is according to INTEL’s PC SDRAM Rev.1.0 module specification.

The DIMMs have a serial presence detect, implemented with a serial E 2PROM using the two pin I2C protocol. The first 128 bytes are utilized by the DIMM manufacturer and the second 128 bytes are available to the end user.

All SIEMENS 168-pin DIMMs provide a high performance, flexible 8-byte interface in a 133,35 mm long footprint, with 1,25“( 31,75 mm) height

Ordering Information

Type	Ordering Code	Package	Descriptions			Module
						Height
HYS 64V2200GU-8	PC100-222-620	L-DIM-168-29	100 Mhz 2M x 64 1 bank SDRAM module			1,25“
HYS 72V2200GU-8	PC100-222-620	L-DIM-168-29	100 MHz 2M x 72 1 bank SDRAM module			1,25“
HYS 64V4220GU-8	PC100-222-620	L-DIM-168-29	100 Mhz 4M x 64 2 bank SDRAM module			1,25“
HYS 72V4220GU-8	PC100-222-620	L-DIM-168-29	100 Mhz 4M x 72 2 bank SDRAM module			1,25“
HYS 64V2200GU-8-3	PC100-323-620	L-DIM-168-29	100 Mhz 2M x 64 1 bank SDRAM module			1,25“
HYS 72V2200GU-8-3	PC100-323-620	L-DIM-168-29	100 MHz 2M x 72 1 bank SDRAM module			1,25“
HYS 64V4220GU-8-3	PC100-323-620	L-DIM-168-29	100 Mhz 4M x 64 2 bank SDRAM module			1,25“
HYS 72V4220GU-8-3	PC100-323-620	L-DIM-168-29	100 Mhz 4M x 72 2 bank SDRAM module			1,25“
HYS 64V2200GU-10	PC66-222-920	L-DIM-168-29	66	Mhz 2M x 64	1 bank SDRAM module	1,25“
HYS 72V2200GU-10	PC66-222-920	L-DIM-168-29	66	MHz 2M x 72 1 bank SDRAM module		1,25“
HYS 64V4220GU-10	PC66-222-920	L-DIM-168-29	66	Mhz 4M x 64	2 bank SDRAM module	1,25“
HYS 72V4220GU-10	PC66-222-920	L-DIM-168-29	66	Mhz 4M x 72	2 bank SDRAM module	1,25“

Pin Names

A0-A10

Address Inputs

CLK0 - CLK3

Clock Input

BA

Bank Address

DQMB0 - DQMB7

Data Mask

DQ0 - DQ63

Data Input/Output

CS0

-

CS3

Chip Select

CB0-CB7

Check Bits (x72

Vcc

Power (+3.3 Volt)

organisation only)

RAS

Row Address Strobe

Vss

Ground

CAS

Column Address Strobe

SCL

Clock for Presence Detect

WE

Read / Write Input

SDA

Serial Data Out for Presence Detect

CKE0, CKE1

Clock Enable

N.C.

No Connection

Address Format:

	Part Number	Rows	Columns	Banks	Refresh	Period	Interval
2M x 64	HYS 64V2200GU	11	9	1	4k	64 ms	15,6 μs
2M x 72	HYS 72V2200GU	11	9	1	4k	64 ms	15,6 μs
4M x 64	HYS 64V4220GU	11	9	1	4k	64 ms	15,6 μs
4M x 72	HYS 72V4220GU	11	9	1	4k	64 ms	15,6 μs

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HYS64(72)V2200/4220GU-8/-10

SDRAM-Modules

Pin Configuration

	PIN #	Symbol	PIN #	Symbol		PIN #	Symbol	PIN #	Symbol
	1	VSS	43	VSS		85	VSS	127	VSS
	2	DQ0	44	DU		86	DQ32	128	CKE0
	3	DQ1	45	CS2		87	DQ33	129	CS3
	4	DQ2	46	DQMB2		88	DQ34	130	DQMB6
	5	DQ3	47	DQMB3		89	DQ35	131	DQMB7
	6	VCC	48	DU		90	VCC	132	NC
	7	DQ4	49	VCC		91	DQ36	133	VCC
	8	DQ5	50	NC		92	DQ37	134	NC
	9	DQ6	51	NC		93	DQ38	135	NC
	10	DQ7	52	NC (CB2)		94	DQ39	136	CB6
	11	DQ8	53	NC (CB3)		95	DQ40	137	CB7
	12	VSS	54	VSS		96	VSS	138	VSS
	13	DQ9	55	DQ16		97	DQ41	139	DQ48
	14	DQ10	56	DQ17		98	DQ42	140	DQ49
	15	DQ11	57	DQ18		99	DQ43	141	DQ50
	16	DQ12	58	DQ19		100	DQ44	142	DQ51
	17	DQ13	59	VCC		101	DQ45	143	VCC
	18	VCC	60	DQ20		102	VCC	144	DQ52
	19	DQ14	61	NC		103	DQ46	145	NC
	20	DQ15	62	DU		104	DQ47	146	DU
	21	NC (CB0)	63	CKE1		105	NC (CB4)	147	NC
	22	NC (CB1)	64	VSS		106	NC (CB5)	148	VSS
	23	VSS	65	DQ21		107	VSS	149	DQ53
	24	NC	66	DQ22		108	NC	150	DQ54
	25	NC	67	DQ23		109	NC	151	DQ55
	26	VCC	68	VSS		110	VCC	152	VSS
	27	WE	69	DQ24		111	CAS	153	DQ56
	28	DQMB0	70	DQ25		112	DQMB4	154	DQ57
	29	DQMB1	71	DQ26		113	DQMB5	155	DQ58
	30	CS0	72	DQ27		114	CS1	156	DQ59
	31	DU	73	VCC		115	RAS	157	VCC
	32	VSS	74	DQ28		116	VSS	158	DQ60
	33	A0	75	DQ29		117	A1	159	DQ61
	34	A2	76	DQ30		118	A3	160	DQ62
	35	A4	77	DQ31		119	A5	161	DQ63
	36	A6	78	VSS		120	A7	162	VSS
	37	A8	79	CLK2		121	A9	163	CLK3
	38	A10	80	NC		122	BA	164	NC
	39	NC	81	WP		123	NC	165	SA0
	40	VCC	82	SDA		124	VCC	166	SA1
	41	VCC	83	SCL		125	CLK1	167	SA2
	42	CLK0	84	VCC		126	NC	168	VCC
Note : Pinnames in brackets are for the x72 ECC versions

Semiconductor Group

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HYS64(72)V2200/4220GU-8/-10

SDRAM-Modules

WE

CS0

DQMB0

CS WE

DQMB4

CS WE

DQM

DQM

DQ(7:0)

DQ0-DQ7

DQ(39:32)

DQ0-DQ7

D0

D4

CS

WE

CS

WE

DQM

DQM

DQMB1

DQMB5

DQ0-DQ7

DQ0-DQ7

DQ(15:8)

D1

DQ(47:40)

D5

CS

WE

CB(7:0)

DQM

DQ0-DQ7

D8

CS2

DQMB2

CS

WE

CS

WE

DQM

DQMB6

DQM

DQ0-DQ7

DQ(55:48)

DQ0-DQ7

DQ(23:16)

D2

D6

CS

WE

DQMB7

CS

WE

DQM

DQM

DQMB3

DQ0-DQ7

DQ(63:56)

DQ0-DQ7

DQ(31:24)

D3

D7

D0 - D7,(D8)

E2PROM (256wordx8bit)

A0-A10,BA

VCC

D0 - D7,(D8)

SA0

SA0

SDA

C0-C7,(C8)

SA1

SA1

VSS

D0 - D7,(D8)

SA2

SA2

WP

SCL

SCL

47k

RAS

D0 - D7,(D8)

CAS

D0 - D7,(D8)

Clock Wiring

CKE0

D0 - D7,(D8)

2M x 64

2M x 72

CLK0

4 SDRAM+3.3pF

5 SDRAM

Note: D8 is only used in the x72 ECC version

CLK1

Termination

Termination

CLK2

4 SDRAM+3.3pF

4 SDRAM+3.3pF

CLK3

Termination

Termination

Block Diagram for 2M x 64/72 SDRAM DIMM modules (HYS64/72V2200GU)

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HYS64(72)V2200/4220GU-8/-10

SDRAM-Modules

CS1

CS0

CS

CS

CS

CS

DQMB0

DQM

DQM

DQMB4

DQM

DQM

DQ(7:0)

DQ0-DQ7

DQ0-DQ7

DQ(39:32)

DQ0-DQ7

DQ0-DQ7

D0

D8

D4

D12

CS

CS

CS

CS

DQMB1

DQM

DQM

DQMB5

DQM

DQM

DQ(15:8)

DQ0-DQ7

DQ0-DQ7

DQ(47:40)

DQ0-DQ7

DQ0-DQ7

D1

D9

D5

D13

CS

CS

DQM

DQM

CB(7:0)

DQ0-DQ7

DQ0-DQ7

D16

D17

CS3

CS2

CS

CS

CS

CS

DQMB2

DQM

DQM

DQMB6

DQM

DQM

DQ(23:16)

DQ(55:48)

DQ0-DQ7

DQ0-DQ7

DQ0-DQ7

DQ0-DQ7

D2

D10

D6

D14

DQMB3

CS

CS

CS

CS

DQM

DQM

DQMB7

DQM

DQM

DQ(31:24)

DQ0-DQ7

DQ0-DQ7

DQ(63:56)

DQ0-DQ7

DQ0-DQ7

D3

D11

D7

D15

A0-A10,BA

D0 - D15,(D16,D17)

E2PROM (256wordx8bit)

VDD

D0 - D15,(D16,D17)

SA0

SA0

SDA

SA1

SA1

C0-C31,(C32..C35)

WP

VSS

D0 - D7,(D8)

SA2

SA2

SCL

SCL

47k

D0 - D15,(D16,D17)

RAS,

CAS,

WE

CKE0

D0 - D7,(D16)

Clock Wiring

4M x 64

4M x 72

VDD

CLK0

4 SDRAM+3.3pF

5 SDRAM

10k

CLK1

4 SDRAM+3.3pF

5 SDRAM

CKE1

D9 - D15,(D17)

CLK2

4 SDRAM+3.3pF

4 SDRAM+3.3pF

CLK3

4 SDRAM+3.3pF

4 SDRAM+3.3pF

Note: D16 & D17

is only used in the x72 ECC version and all resistor values are 10 Ohms except otherwise noted.

Block Diagram for 4M x 64/72 SDRAM DIMM modules (HYS64/72V4220GU)

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HYS64(72)V2200/4220GU-8/-10

SDRAM-Modules

DC Characteristics

TA = 0 to 70 °C; VSS = 0 V; VDD,VDDQ = 3.3 V ± 0.3 V

Parameter	Symbol	Limit Values		Unit
		min.	max.
Input high voltage	VIH	2.0	Vcc+0.3	V
Input low voltage	VIL	– 0.5	0.8	V
Output high voltage (IOUT = – 2.0 mA)	VOH	2.4	–	V
Output low voltage (IOUT = 2.0 mA)	VOL	–	0.4	V
Input leakage current, any input	II(L)	– 40	40	μA
(0 V < VIN < 3.6 V, all other inputs = 0 V)
Output leakage current	IO(L)	– 40	40	μA
(DQ is disabled, 0 V < VOUT < VCC)

Capacitance

TA = 0 to 70 °C; VDD = 3.3 V ± 0.3 V, f = 1 MHz

Parameter							Symbol		Limit Values			Unit
								max.	max.	max.	max.
								2Mx64	2Mx72	4Mx64	4Mx72
Input capacitance							CI1	45	55	80	90	pF
(A0 to A10, BA,	RAS,		CAS,		WE)
Input capacitance (CS0 -CS3 )							CI2	20	25	30	35	pF
Input capacitance (CLK0 - CLK3)							CICL	22	38	22	38	pF
Input capacitance (CKE0, CKE1)							CI3	22	38	50	55	pF
Input capacitance (DQMB0 - DQMB7)							CI4	13	13	20	20	pF
Input / Output capacitance							CIO	13	12	20	20	pF
(DQ0-DQ63,CB0-CB7)
Input Capacitance (SCL,SA0-2)							Csc	8	8	8	8	pF
Input/Output Capacitance							Csd	10	10	10	10	pF

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