1M × 36-Bit Dynamic RAM Module |
HYM 361120/40S/GS-60/-70 |
(2M × 18-Bit Dynamic RAM Module) |
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Advanced Information
•1 048 576 words by 36-bit organization (alternative 2 097 152 words by 18-bit)
•Fast access and cycle time 60 ns access time
110 ns cycle time (-60 version)
70 ns access time
130 ns cycle time (-70 version)
•12 decoupling capacitors mounted on substrate
•All inputs, outputs and clock fully TTL compatible
•72 pin Single in-Line Memory Module
•Utilizes four 1M × 1-DRAMs and eight 1M × 4-DRAMs in 300 mil SOJ packages
•Fast page mode capability with 40 ns cycle time (-60 version) 45 ns cycle time (-70 version)
•Single + 5 V (± 10 %) supply
•Low power dissipation
max. 6820 mW active (-60 version) max. 6160 mW active (-70 version)
CMOS – |
66 mW standby |
TTL – |
132 mW standby |
•CAS-before-RAS refresh, RAS-only-refresh, Hidden refresh
Ordering Information
•1024 refresh cycles/16 ms
•Tin-Lead contact pads (S - version)
•Gold contact pads (GS - version)
•HYM 321140S: single sided module with
31.75mm (1250 mil) height
•HYM 321120S: double sided module with
25.40mm (1000 mil) height
Type |
Ordering Code |
Package |
Descriptions |
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HYM 361140S-60 |
Q67100-Q959 |
L-SIM-72-8 |
DRAM module (access time 60 ns) |
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HYM 361140S-70 |
Q67100-Q958 |
L-SIM-72-8 |
DRAM module (access time 70 ns) |
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HYM 361120S-60 |
Q67100-Q942 |
L-SIM-72-3 |
DRAM module (access time 60 ns) |
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HYM 361120S-70 |
Q67100-Q741 |
L-SIM-72-3 |
DRAM module (access time 70 ns) |
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HYM 361140GS-60 |
Q67100-Q1019 |
L-SIM-72-8 |
DRAM module (access time 60 ns) |
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HYM 361140GS-70 |
Q67100-Q651 |
L-SIM-72-8 |
DRAM module (access time 70 ns) |
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HYM 361120GS-60 |
Q67100-Q961 |
L-SIM-72-3 |
DRAM module (access time 60 ns) |
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HYM 361120GS-70 |
Q67100-Q960 |
L-SIM-72-3 |
DRAM module (access time 70 ns) |
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Semiconductor Group |
591 |
06.94 |
HYM 361120/40S/GS-60/-70 1M × 36-Bit
The HYM 361120/40S/GS-60/-70 is a 4 MByte DRAM module organized as 1 048 576 words by 36-bit in a 72-pin single-in-line package comprising four HYB 511000BJ 1M × 1 DRAMs and eight HYB 514400BJ 1M × 4 DRAMs in 300 mil wide SOJ-packages mounted together with twelve 0.2 µF ceramic decoupling capacitors on a PC board.
The HYM 361120/40S/GS-60/-70 can also be used as a 2 097 152 words by 18-bits dynamic RAM module by means of connecting DQ0 and DQ18, DQ1 and DQ19, DQ2 and DQ20, …, DQ17 and DQ35, respectively.
Each HYB 511000BJ and HYB 514400BJ is described in the data sheet and is fully electrically tested and processed according to Siemens standard quality procedure prior to module assembly. After assembly onto the board, a further set of electrical tests is performed.
The speed of the module can be detected by the use of four presence detect pins.
The common I/O feature on the HYM 361120/40S/GS-60/-70 dictates the use of early write cycles.
Pin Definitions and Functions
Pin No. |
Function |
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A0-A9 |
Address Inputs |
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DQ0-DQ35 |
Data Input/Output |
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- |
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Column Address Strobe |
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CAS0 |
CAS3 |
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Row Address Strobe |
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RAS0, |
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RAS2 |
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Read/Write Input |
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WE |
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VCC |
Power (+ 5 V) |
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VSS |
Ground |
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PD |
Presence Detect Pin |
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N.C. |
No Connection |
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Presence Detect Pins |
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-60 |
-70 |
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PD0 |
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VSS |
VSS |
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PD1 |
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VSS |
VSS |
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PD2 |
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N.C. |
VSS |
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PD3 |
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N.C. |
N.C. |
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Semiconductor Group |
592 |
HYM 361120/40S/GS-60/-70 1M × 36-Bit
Pin Configuration
(top view)
Semiconductor Group |
593 |