MITSUBISHI MEMORY CARD
STATIC RAM CARDS
8/16-bit Data Bus
Static RAM Card
Connector Type
Twopiece 68-pin
MF365A-LZCATXX MF3129-LZCATXX MF3257-LZCATXX MF3513-LZCATXX MF31M1-LZCATXX MF32M1-LZCATXX MF34M1-LZCATXX
1. DESCRIPTION
Mitsubishi’s Static RAM cards provide large memory capacities on a device approximately the size of a credit card (85.6mm×54mm×3.3mm).
The cards use a 8/16 bit data-bus. The devices use a replaceable lithium battery to maintain data. Available in 64K byte-4M byte capacities, Mitsubishi’s Static RAM cards are available with a 68-pin, two-piece connector.
4. PRODUCT LIST
2. FEATURES
nUses TSOP (Thin Small Outline Package) to achieve very high memory density coupled with high reliability, without enlarging card size
nElectrostatic discharge protection to 15kV nBuffered interface
nWrite protect switch nAttribute memory n68pin
3. APPLICATIONS
nOffice automation nData Communication nComputers nIndustrial nTelecommunications nConsumer
Item |
Memory |
Data Bus |
Attribute |
Auxiliary |
Type name |
capacity |
width(bits) |
memory |
battery |
MF365A-LZCATXX |
64KB |
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MF3129-LZCATXX |
128KB |
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MF3257-LZCATXX |
256KB |
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MF3513-LZCATXX |
512KB |
8/16 |
8KB |
NO |
MF31M1-LZCATXX |
1MB |
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E2PROM |
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MF32M1-LZCATXX |
2MB |
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MF34M1-LZCATXX |
4MB |
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MITSUBISHI |
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ELECTRIC |
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1/16 |
Apr. 1999 Rev. 1.1 |
MITSUBISHI MEMORY CARD
STATIC RAM CARDS
5. SUMMARY
MF3XXX-LZCATXX series is the Static RAM cards which has 8/16 bit changeable data-bus width.
The card has a replaceable lithium battery to maintain data in memory. When the card is not use or the supply voltage drops, the battery will automatically maintain data in memory.
6. FUNCTIONAL DESCRIPTION
The function of the card is determined by the combination of the following five control signals,
REG#, CE1#, CE2#, OE#, WE#; active low signals. (Please refer to section 10 FUNCTION TABLE on page 5)
(1)COMMON MEMORY FUNCTION
When REG# signal is high level, the common memory area is selected.
(a)READ MODE
To read, WE# is set high level and CE1# or CE2# is set low level and the memory address is applied at inputs A0-A21(4MB). Setting OE# low level executes the reading with output at data-bus. It is available to make the following functions according to the combination of CE1# and CE2#.
When CE1# is set low level and CE2# is set high level, the card operates as an 8 bit data-bus width card. The data can be dealt with lower data-bus(D0-D7).
When both CE1# and CE2# are set low level, the card operates as a 16 bit data-bus width card. At this mode LSB of address-bus (A0) is ignored.
In addition odd byte can be accessed through upper data-bus(D8-D15) when CE1# is set high level and CE2# is set low level. This mode is useful when handling only odd bytes in the 16 bit data-bus interface system (A0 is ignored).
When both CE1# and CE2# are set high level, the card becomes a standby mode where the card consumes low power and the data-bus is placed in high impedance state (above functions of CE1# and CE2# are the same as in the following modes).
When both OE# and WE# are set high level, the card becomes a output disable mode and the data-bus is placed in high impedance state.
(b)WRITE MODE
To write, the memory address is first applied at inputs A0-A21(4MB) and the data is applied at output pins. Setting CE1# or CE2# low level, WE# low level and OE# high level executes the writing.
(2)ATTRIBUTE MEMORY FUNCTION
When REG# is set low level, the attribute memory area is selected. MF3XXX-LZCATXX series accommodates an attribute memory of 8KB E2PROM on even addresses.
(a)READ MODE
First set CE1# and CE2# low level or high level and select residing address (even address). Data can be read by setting OE# low level and WE# high level.
(b)WRITE MODE
Writing can be done either by byte-mode or page-mode. The page-mode write is the function to be able to write data of 32 bytes in a single write cycle. The page address is set by A6 to A13 (Please note that attribute memory exists in even bytes only). To write, set OE# high level and WE# low level. Data will be latched at the rising edge of WE#. After the first load unless WE# changes from high level to low level within 30μs, the automatic erase/program starts and completes in 10ms or before. Page data can be latched if WE# transits from high level to low level before the 30μs. Page-mode write also executes erase/program operation within 10ms.
The page address must be maintained during the page data loading.
7. WRITE PROTECT MODE
When the write protect switch is switched on, this card goes into a write protect mode that can read but not write data. In this mode, WP pin becomes “H” level.
At the shipment the write protect switch is switched off (Normal mode : The card can be written ; WP pin indicates “L” level).
MITSUBISHI |
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Apr. 1999 Rev. 1.1 |
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STATIC RAM CARDS |
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8 . PIN ASSIGNMENTS |
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Pin |
Symbol |
F u n c t i o n |
Pin |
Symbol |
F u n c t i o n |
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No. |
No. |
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1 |
GND |
Ground |
35 |
GND |
Ground |
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2 |
D3 |
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36 |
CD1# |
Card detect 1 |
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3 |
D4 |
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37 |
D11 |
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4 |
D5 |
Data I/O |
38 |
D12 |
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5 |
D6 |
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39 |
D13 |
Data I/O |
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6 |
D7 |
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40 |
D14 |
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7 |
CE1# |
Card enable 1 |
41 |
D15 |
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8 |
A10 |
Address input |
42 |
CE2# |
Card enable 2 |
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9 |
OE# |
Output enable |
43 |
NC |
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10 |
A11 |
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44 |
NC |
No connection |
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11 |
A9 |
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45 |
NC |
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12 |
A8 |
Address input |
46 |
A17 |
A17 (NC for < 128KB types) |
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13 |
A13 |
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47 |
A18 |
A18 (NC for < 256KB types) |
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14 |
A14 |
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48 |
A19 |
A19 (NC for < 512KB types) |
Address |
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15 |
WE# |
Write enable |
49 |
A20 |
A20 (NC for < 1MB type) |
input |
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16 |
NC |
No connection |
50 |
A21 |
A21 (NC for < 2MB type) |
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17 |
VCC |
Power supply voltage |
51 |
VCC |
Power supply voltage |
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18 |
NC |
No connection |
52 |
NC |
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19 |
A16 |
A16 (NC for 64KB type) |
53 |
NC |
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20 |
A15 |
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54 |
NC |
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21 |
A12 |
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55 |
NC |
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22 |
A7 |
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56 |
NC |
No connection |
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23 |
A6 |
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57 |
NC |
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24 |
A5 |
Address input |
58 |
NC |
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25 |
A4 |
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59 |
NC |
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26 |
A3 |
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60 |
NC |
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27 |
A2 |
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61 |
REG# |
Attribute memory select |
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28 |
A1 |
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62 |
BVD2 |
Battery voltage detect 2 |
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29 |
A0 |
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63 |
BVD1 |
Battery voltage detect 1 |
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30 |
D0 |
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64 |
D8 |
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31 |
D1 |
Data I/O |
65 |
D9 |
Data I/O |
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32 |
D2 |
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66 |
D10 |
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33 |
WP |
Write protect |
67 |
CD2# |
Card detect 2 |
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34 |
GND |
Ground |
68 |
GND |
Ground |
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3/16 |
Apr. 1999 Rev. 1.1 |
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STATIC RAM CARDS |
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9 . BLOCK DIAGRAM (4MB) |
(MF34M1-LZCATXX) |
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A21 |
ADDRESS- |
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A20 |
9 |
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A0 |
DECODER |
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A19 |
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A18 |
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A17 |
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D15 |
A16 |
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CS# |
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D14 |
A15 |
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D13 |
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A14 |
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8 |
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COMMON |
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D12 |
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A13 |
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A12 |
ADDRESS- |
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MEMORY |
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D11 |
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A11 |
19 |
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D10 |
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BUS |
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A10 |
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D9 |
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A9 |
BUFFERS |
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DATA-BUS |
D8 |
A8 |
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A6 |
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4Mbit SRAM×8 |
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8 |
BUFFERS |
D7 |
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D6 |
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A7 |
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A5 |
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OE# |
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D5 |
A4 |
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D4 |
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A3 |
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WE# |
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D3 |
A2 |
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D2 |
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A1 |
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D1 |
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CS# |
ATTRIBUTE |
8 |
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D0 |
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MEMORY |
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CE1# |
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13 |
OE# |
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CE2# |
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64Kbit |
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MODE |
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WE# E2PROM×1 |
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WE# |
CONTROL |
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OE# |
LOGIC |
2 |
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REG# |
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TO INTERNAL |
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WP# |
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POWER SUPPLY |
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WRITE PROTECT |
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VOLTAGE DETECTOR |
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VCC |
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ON |
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OFF |
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& |
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BVD2 |
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POWER CONTROLLER |
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BVD1 |
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CD1# |
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CR2025 |
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GND |
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CD2# |
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MITSUBISHI |
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ELECTRIC |
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4/16 |
Apr. 1999 Rev. 1.1 |
MITSUBISHI MEMORY CARD
STATIC RAM CARDS
10 . FUNCTION TABLE
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Mode |
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REG# |
CE1# |
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CE2# |
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OE# |
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WE# |
A0 |
I/O (D15~D8) |
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I/O (D7~D0) |
Icc |
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Standby |
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X |
H |
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H |
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X |
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X |
X |
High-impedance |
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High-impedance |
standby |
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Read A (16bit) |
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H |
L |
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L |
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L |
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H |
X |
Odd Byte |
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Even Byte |
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Active |
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common |
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Data out |
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Data out |
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Write A (16bit) |
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H |
L |
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L |
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H |
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L |
X |
Odd Byte |
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Even Byte |
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Active |
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common |
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Data in |
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Data in |
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Read B (8bit) |
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H |
L |
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H |
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L |
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H |
L |
High-impedance |
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Even Byte |
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Active |
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common |
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Data out |
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H |
L |
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H |
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L |
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H |
H |
High-impedance |
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Odd Byte |
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Active |
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Data out |
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Write B (8bit) |
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H |
L |
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H |
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H |
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L |
L |
High-impedance |
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Even Byte Data in |
Active |
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common |
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H |
L |
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H |
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H |
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L |
H |
High-impedance |
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Odd Byte Data in |
Active |
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Read C (8bit) |
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H |
H |
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L |
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L |
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H |
X |
Odd Byte |
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High-impedance |
Active |
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common |
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Data out |
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Write C (8bit) |
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H |
H |
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L |
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H |
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L |
X |
Odd Byte |
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High-impedance |
Active |
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common |
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Data in |
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Output disable |
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X |
X |
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X |
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H |
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H |
X |
High-impedance |
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High-impedance |
Active |
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Read A (16bit) |
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L |
L |
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L |
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L |
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H |
X |
Data out |
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Even Byte |
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Active |
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attribute |
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(unknown) |
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Data out |
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Read B (8bit) |
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L |
L |
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H |
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L |
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H |
L |
High-impedance |
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Even Byte |
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Active |
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attribute |
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Data out |
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L |
L |
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H |
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L |
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H |
H |
High-impedance |
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Data out |
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Active |
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(unknown) |
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Read C (8bit) |
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L |
H |
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L |
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L |
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H |
X |
Data out |
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High-impedance |
Active |
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attribute |
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(unknown) |
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Write A (16bit) |
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L |
L |
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L |
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H |
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L |
X |
don’t care |
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Even Byte Data in |
Active |
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attribute |
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Write B (8bit) |
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L |
L |
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H |
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H |
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L |
L |
don’t care |
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Even Byte Data in |
Active |
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attribute |
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L |
L |
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H |
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H |
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L |
H |
don’t care |
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don’t care |
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Active |
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Write C (8bit) |
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L |
H |
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L |
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H |
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L |
X |
don’t care |
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don’t care |
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Active |
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attribute |
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Note 1 : H=VIH, L=VIL, X=VIH or VIL |
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11. ABSOLUTE MAXIMUM RATINGS |
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Symbol |
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Parameter |
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Conditions |
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Ratings |
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Unit |
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Vcc |
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Supply voltage |
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-0.3~6.0 |
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V |
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VI |
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Input voltage |
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With respect to GND |
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-0.3~VCC+0.3 |
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V |
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VO |
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Output voltage |
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0~VCC |
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V |
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Topr1 |
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Operating temperature 1 |
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Read, Write |
Operation |
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0~60 |
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°C |
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Topr2 |
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Operating temperature 2 |
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Data retention |
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0~60 |
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°C |
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Tstg |
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Storage temperature |
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Excludes data retention |
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-20~70 |
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°C |
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12. RECOMMENDED OPERATING CONDITIONS (Ta=0~55°C, unless otherwise noted) |
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Symbol |
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P a r a m e t e r |
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Limits |
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Unit |
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Min. |
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Typ. |
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Max. |
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Vcc |
Vcc Supply voltage |
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4.75 |
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5.0 |
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5.25 |
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V |
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GND |
System ground |
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0 |
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V |
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VIH |
High input voltage |
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2.4 |
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VCC |
V |
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VIL |
Low input voltage |
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0 |
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0.8 |
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ELECTRIC |
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5/16 |
Apr. 1999 Rev. 1.1 |