UCC5673
Multimode (LVD/SE) SCSI 9 Line Terminator
FEATURES
•Auto Selection Multi-Mode Single Ended or Low Voltage Differential Termination
•2.7V to 5.25V Operation
•Differential Failsafe Bias
•Built-in SPI-3 Mode Change Filter/ Delay
•Meets SCSI-1, SCSI-2, Ultra2 (SPI-2 LVD) and Ultra3/Ultra160 Standards
•Supports Active Negation
•3pF Channel Capacitance
•Reversed Disconnect Polarity
DESCRIPTION
The UCC5673 Multi-Mode Low Voltage Differential and Single Ended Terminator is both a single ended terminator and a low voltage differential terminator for the transition to the next generation SCSI Parallel Interface (SPI-3). The low voltage differential is a requirement for the higher speeds at a reasonable cost and is the only way to have adequate skew budgets.
The automatic mode select/change feature switches the terminator between Single Ended or LVD Termination, depending on the bus mode. If the bus is in High Voltage Differential Mode, the terminator lines transition into a High Impedance state.
The UCC5673 is SPI-3, SPI-2, and SCSI-2 compliant. This device is offered in a 28 pin TSSOP package to minimize the footprint. The UCC5673 is also available in a 36 pin MWP package.
BLOCK DIAGRAM
2.1V |
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HPD |
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DIFFB 17 |
FILTER/ |
LVD |
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DELAY |
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0.6V |
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SE |
DIFSENS
REF 1.3V
TRMPWR |
28 |
TRMPWR |
27 |
10 A
DISCNCT 13
HS/GND |
6 |
HS/GND |
22 |
GND |
14 |
ENABLE |
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SOURCE/SINK |
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REGULATORS |
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SE REF |
SW1 |
110 |
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2.7V |
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56mV |
52 |
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LVD REF |
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– |
+ |
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124 |
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1.25V |
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56mV |
52 |
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+ |
– |
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ENABLE |
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16 DIFSENS
3 L1–
2 L1+
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SE GROUND |
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SWITCH |
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110 |
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MODE |
SW1 |
OTHER |
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56mV |
52 |
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SWITCHES |
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– |
+ |
26 |
L9– |
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SE |
UP |
UP |
124 |
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56mV |
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52 |
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LVD |
DOWN |
DOWN |
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+ |
– |
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25 |
L9+ |
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HPD |
DOWN |
OPEN |
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DISCNCT |
OPEN |
OPEN |
SE GROUND |
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SWITCH |
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1
REG
Note: Indicated pinout is for 28 pin TSSOP package. |
UDG-99162 |
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SLUS438 - FEBRUARY 2000
ABSOLUTE MAXIMUM RATINGS
TRMPWR Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V Signal Line Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 5V Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C Junction Temperature. . . . . . . . . . . . . . . . . . . –55°C to +150°C Lead Temperature (Soldering, 10sec.) . . . . . . . . . . . . . +300°C
All voltages are with respect to GND. Currents are positive into, negative out of the specified terminal. Consult Packaging Section of the Databook for thermal limitations and considerations of packages.
RECOMMENDED OPERATING CONDITIONS
TRMPWR Voltage . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.25V
CONNECTION DIAGRAM
TSSOP-28 (TOP VIEW)
PWP Package
REG |
1 |
28 |
TRMPWR |
L1+ |
2 |
27 |
TRMPWR |
L1– |
3 |
26 |
L9– |
L2+ |
4 |
25 |
L9+ |
L2– |
5 |
24 |
L8– |
HS/GND |
6 |
23 |
L8+ |
L3+ |
7 |
22 |
HS/GND |
L3– |
8 |
21 |
L7– |
L4+ |
9 |
20 |
L7+ |
L4– |
10 |
19 |
L6– |
L5+ |
11 |
18 |
L6+ |
L5– |
12 |
17 |
DIFFB |
DISCNCT |
13 |
16 |
DIFSENS |
GND |
14 |
15 |
N/C |
UCC5673
QSOP-36 (TOP VIEW)
MWP Package
1 |
REG |
TRMPWR |
36 |
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2 |
N/ |
N/ |
35 |
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C |
C |
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3 |
N/ |
N/ |
34 |
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C |
C |
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4 |
L1+ |
N/ |
33 |
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C |
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5 |
L1– |
L9– |
32 |
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6 |
L2+ |
L9+ |
31 |
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7 |
L2– |
L8– |
30 |
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8 |
HS/GND |
L8+ |
29 |
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9 |
HS/GND |
HS/GND |
28 |
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10 |
HS/GND |
HS/GND |
27 |
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11 |
L3+ |
HS/GND |
26 |
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12 |
L3– |
L7– |
25 |
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13 |
L4+ |
L7+ |
24 |
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14 |
L4– |
L6– |
23 |
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15 |
L5+ |
L6+ |
22 |
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16 |
L5– |
DIFF B |
21 |
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17 |
DISCNCT |
DIFSENS |
20 |
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18 |
GND |
N/C |
19 |
2
UCC5673
ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for TA = TJ = 0°C to 70°C, TRMPWR = 2.7V to 5.25V.
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PARAMETER |
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TEST CONDITIONS |
MIN |
TYP |
MAX |
UNITS |
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TRMPWR Supply Current Section |
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TRMPWR Supply Current |
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LVD Mode |
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23 |
35 |
mA |
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SE Mode |
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14 |
25 |
mA |
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µ A |
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DISCNCT Mode |
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250 |
500 |
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Regulator Section |
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1.25V Regulator Output Voltage |
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LVD Mode |
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1.15 |
1.25 |
1.35 |
V |
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1.25V Regulator Source Current |
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VREG= 0V |
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–800 |
–420 |
–225 |
mA |
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1.25V Regulator Sink Current |
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VREG= 3.3V |
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100 |
180 |
420 |
mA |
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2.7V Regulator Output Voltage |
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SE Mode |
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2.5 |
2.7 |
3.0 |
V |
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2.7V Regulator Source Current |
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VREG= 0V |
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–800 |
–420 |
–225 |
mA |
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2.7V Regulator Sink Current |
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VREG= 3.3V |
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100 |
180 |
420 |
mA |
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Diff Sense Driver (DIFSENS) Section |
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1.3V DIFSENS Output Voltage |
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DIFSENS |
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1.2 |
1.3 |
1.4 |
V |
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1.3V DIFSENS Source Current |
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VDIFSENS = 0V |
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–15 |
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–5 |
mA |
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1.3V DIFSENS Sink Current |
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VDIFSENS = 2.75V |
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50 |
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200 |
µ A |
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Differential Termination Section |
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Differential Impedance |
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100 |
105 |
110 |
Ω |
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Common Mode Impedance |
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(Note 2) |
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110 |
150 |
165 |
Ω |
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Differential Bias Voltage |
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100 |
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125 |
mV |
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Common Mode Bias |
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1.15 |
1.25 |
1.35 |
V |
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Output Capacitance |
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Single Ended Measurement to Ground (Note 1) |
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3 |
pF |
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Single Ended Termination Section |
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Impedance |
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Z = |
(VLX − 0 . 2V ) |
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, (Note 3) |
100 |
108 |
116 |
Ω |
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IL |
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X |
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Termination Current |
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Signal Level 0.2V, All Lines Low |
–25.4 |
–23 |
–20 |
mA |
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Signal Level 0.5V |
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–22.4 |
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–17 |
mA |
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Output Leakage |
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400 |
nA |
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Output Capacitance |
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Single Ended Measurement to Ground (Note 1) |
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3 |
pF |
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Single Ended GND SE Impedance |
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I = 10mA |
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20 |
60 |
Ω |
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Disconnect (DISCNCT) and Diff Buffer (DIFFB) Input Section |
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DISCNCT Threshold |
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0.8 |
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2.0 |
V |
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µ A |
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DISCNCT Input Current |
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–30 |
–10 |
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DIFFB SE to LVD Threshold |
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0.5 |
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0.7 |
V |
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DIFFB LVD to HPD Threshold |
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1.9 |
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2.4 |
V |
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DIFFB Input Current |
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–1 |
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1 |
µ A |
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3
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