TEXAS INSTRUMENTS TIBPAL16L8-15M, TIBPAL16R4-15M, TIBPAL16R6-15M, TIBPAL16R8-15M Technical data

TIBPAL16L8-15MTIBPAL16L8-15M, TIBPAL16R4-15M, TIBPAL16R6-15M, TIBPAL16R8-15M HIGH-PERFORMANCE IMPACT PAL CIRCUITS

SRPS018A ± D3338, JANUARY 1986 ± REVISED MAY 1996

D High-Performance Operation:

TIBPAL16L8'

Propagation Delay . . . 15 ns Max

J OR W PACKAGE

D Power-Up Clear on Registered Devices (All

(TOP VIEW)

Register Outputs are Set High, but Voltage

I

VCC

1

20

Levels at the Output Pins Go Low)

D Package Options Include Ceramic Flat (W)

I

2

19

O

I

3

18

I/O

Packages, Ceramic Chip Carriers (FK), and

I

4

17

I/O

Ceramic (J) 300-mil DIPs

I

5

16

I/O

D Dependable Texas Instruments Quality and

I

6

15

I/O

Reliability

I

7

14

I/O

I

8

13

I/O

DEVICE

I

3-STATE

REGISTERED

I/O

INPUTS

O OUTPUTS

Q OUTPUTS

PORTS

I

9

12

O

PAL16L8

10

2

0

6

GND

10

11

I

PAL16R4

8

0

4 (3-state buffers)

4

PAL16R6

8

0

6 (3-state buffers)

2

TIBPAL16L8'

PAL16R8

8

0

8 (3-state buffers)

0

FK PACKAGE

description

(TOP VIEW)

These programmable array logic devices feature high speed and functional equivalency when compared with currently available devices. These IMPACT-X circuits combine the latest Advanced Low-Power Schottky technology with proven titanium-tungsten fuses to provide reliable, high-performance substitutes for conventional TTL logic. Their easy programmability allows for quick design of custom functions and typically results in a more compact circuit board. In addition, chip carriers are available for futher reduction in board space.

				CC	O
	I I I V
I	3	2	1	20 19		I/O
	4				18
I	5				17	I/O
I	6				16	I/O
I	7				15	I/O
I	8				14	I/O
	9	10 11 12 13
	I	GND	I	O	I/O

The TIBPAL16' M series is characterized for operation over the full military temperature range of ±55°C to 125°C.

Pin assignments in operating mode

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

IMPACT is a trademark of Texas Instruments Incorporated.

PAL is a registered trademark of Advanced Micro Devices Inc.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 1996, Texas Instruments Incorporated

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

1

TIBPAL16L8-15M, TIBPAL16R4-15M, TIBPAL16R6-15M, TIBPAL16R8-15M HIGH-PERFORMANCE IMPACT PAL CIRCUITS

SRPS018A ± D3338, JANUARY 1986 ± REVISED MAY 1996

TIBPAL16R4'	TIBPAL16R4'
J OR W PACKAGE	FK PACKAGE
(TOP VIEW)	(TOP VIEW)

			VCC		I	I	CLK V		I/O
CLK	1	20						CC
I	2	19	I/O
I	3	18	I/O	I	3	2	1	20 19		I/O
I	4	17	Q		4				18
				I	5				17	Q
I	5	16	Q
				I	6				16	Q
I	6	15	Q
				I	7				15	Q
I	7	14	Q
				I	8				14	Q
I	8	13	I/O
					9	10 11 12 13
I	9	12	I/O		I	GND	OE	I/O	I/O
GND	10	11	OE
	TIBPAL16R6'				TIBPAL16R6'
J OR W PACKAGE					FK PACKAGE
	(TOP VIEW)					(TOP VIEW)
			VCC		I	I	CLK V		I/O
CLK	1	20						CC
I	2	19	I/O
I	3	18	Q	I	3	2	1	20 19		Q
I	4	17	Q		4				18
				I	5				17	Q
I	5	16	Q
				I	6				16	Q
I	6	15	Q
				I	7				15	Q
I	7	14	Q
				I	8				14	Q
I	8	13	Q
					9	10 11 12 13
I	9	12	I/O		I	GND	OE	I/O	Q
GND	10	11	OE
	TIBPAL16R8'				TIBPAL16R8'
J OR W PACKAGE					FK PACKAGE
	(TOP VIEW)					(TOP VIEW)
CLK	1	20	VCC		I	I	CLK	CC	Q
I								V
	2	19	Q
I	3	18	Q	I	3	2	1	20 19		Q
I	4	17	Q		4				18
				I	5				17	Q
I	5	16	Q
				I	6				16	Q
I	6	15	Q
				I	7				15	Q
I	7	14	Q
				I	8				14	Q
I	8	13	Q
					9	10 11 12 13
I	9	12	Q		I	GND	OE Q		Q
GND	10	11	OE

Pin assignments in operating mode

2	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

TIBPAL16L8-15M, TIBPAL16R4-15M, TIBPAL16R6-15M, TIBPAL16R8-15M HIGH-PERFORMANCE IMPACT PAL CIRCUITS

SRPS018A ± D3338, JANUARY 1986 ± REVISED MAY 1996

functional block diagrams (positive logic)

TIBPAL16L8'

10	16 x
	16

I

6

16

OE

CLK

8	16 x
	16
I
4
4	16

&	7	EN ≥ 1	O
32 X 64
	7		O
	7		I/O
	7		I/O
	7		I/O
	7		I/O
	7		I/O
	7		I/O
	6
TIBPAL16R4'
			EN 2
			C1
&	8	≥ 1	I = 1 2
32 X 64			1D
	8

8

8

EN ≥ 1

7

7

7

7

4

4

Q

Q

Q

Q

I/O

I/O

I/O

I/O

denotes fused inputs

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

3

TIBPAL16L8-15M, TIBPAL16R4-15M, TIBPAL16R6-15M, TIBPAL16R8-15M HIGH-PERFORMANCE IMPACT PAL CIRCUITS

SRPS018A ± D3338, JANUARY 1986 ± REVISED MAY 1996

functional block diagrams (positive logic)

TIBPAL16R6'

OE				EN 2
CLK				C1
	&	8	≥ 1	I = 1 2
	32 X 64			1D
		8
	16 x	8
8
	16
I		8
6
		8
2	16
		8
		7	EN ≥ 1
		7
		2
			6
	TIBPAL16R8'
OE				EN 2
CLK				C1
	&	8	≥ 1	I = 1 2
	32 X 64			1D
		8
	16 x	8
8
	16
I		8
		8
8	16
		8

8

8

8

denotes fused inputs

Q

Q

Q

Q

Q

Q

I/O

I/O

Q

Q

Q

Q

Q

Q

Q

Q

4	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265