Samsung KM416V4100CS-L6, KM416V4100CS-L5, KM416V4100CS-L45, KM416V4100CS-6, KM416V4100CS-45 Datasheet

KM416V4000C, KM416V4100C

CMOS DRAM

4M x 16bit CMOS Dynamic RAM with Fast Page Mode

DESCRIPTION

This is a family of 4,194,304 x 16 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -5 or -6), power consumption(Normal or Low power) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 4Mx16 Fast Page Mode DRAM family is fabricated using Samsung′s advanced CMOS process to realize high band-width, low power consumption and high reliability.

FEATURES

• Fast Page Mode operation

• Part Identification

•

2CAS

Byte/Word Read/Write operation

• CAS-before-RAS refresh capability

- KM416V4000C/C-L(3.3V, 8K Ref.)

•

RAS

-only and Hidden refresh capability

- KM416V4100C/C-L(3.3V, 4K Ref.)

• Self-refresh capability (L-ver only)

• Fast parallel test mode capability

• Active Power Dissipation

• LVTTL(3.3V) compatible inputs and outputs

Unit : mW

• Early Write or output enable controlled write

Speed

8K

4K

• JEDEC Standard pinout

• Available in Plastic TSOP(II) packages

-45

324

468

• +3.3V±0.3V power supply

-5

288

432

-6

252

396

• Refresh Cycles

FUNCTIONAL BLOCK DIAGRAM

Part

Refresh

Refresh

time

NO.

cycle

Normal

L-ver

KM416V4000C*

8K

64ms

128ms

RAS

Vcc

KM416V4100C

4K

UCAS

Control

Vss

LCAS

Clocks

VBB Generator

W

*	Access mode & RAS only refresh mode									Lower
	: 8K cycle/64ms(Normal), 8K cycle/128ms(L-ver.)
								Row Decoder		Data in	DQ0
	CAS-before-RAS & Hidden refresh mode						Refresh Timer			Buffer
											to
	: 4K cycle/64ms(Normal), 4K cycle/128ms(L-ver.)						Refresh Control		I/O	Lower	DQ7
										Data out
									&
								Memory Array		Buffer
									Amps
											OE
• Performance Range							Refresh Counter	4,194,304 x 16		Upper
								Cells		Data in
									Sense		DQ8
	Speed	tRAC	tCAC	tRC	tPC	A0~A12	Row Address Buffer			Buffer
										Upper	to
	-45	45ns	12ns	80ns	31ns	(A0~A11)*1					DQ15
						A0~A8	Col. Address Buffer	Column Decoder		Data out
	-5	50ns	13ns	90ns	35ns					Buffer
						(A0~A9)*1
	-6	60ns	15ns	110ns	40ns		Note) *1 : 4K Refresh

SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.

KM416V4000C, KM416V4100C

CMOS DRAM

PIN CONFIGURATION

(Top Views)

•KM416V40(1)00CS

VCC

1

50

VSS

DQ0

2

49

DQ15

DQ1

3

48

DQ14

DQ2

4

47

DQ13

DQ3

5

46

DQ12

VCC

6

45

VSS

DQ4

7

44

DQ11

DQ5

8

43

DQ10

DQ6

9

42

DQ9

DQ7

10

41

DQ8

N.C

11

40

N.C

VCC

12

39

VSS

W

13

38

LCAS

RAS

14

37

UCAS

N.C

15

36

OE

N.C

16

35

N.C

N.C

17

34

N.C

N.C

18

33

A12(N.C)*

A0

19

32

A11

A1

20

31

A10

A2

21

30

A9

A3

22

29

A8

A4

23

28

A7

A5

24

27

A6

VCC

25

26

VSS

(400mil TSOP(II))

*(N.C) : N.C for 4K Refresh Product

Pin Name

Pin function

A0 - A12

Address Inputs(8K Product)

A0 - A11

Address Inputs(4K Product)

DQ0 - 15

Data In/Out

VSS

Ground

Row Address Strobe

RAS

Upper Column Address Strobe

UCAS

Lower Column Address Strobe

LCAS

Read/Write Input

W

Data Output Enable

OE

VCC

Power(+3.3V)

N.C

No Connection

KM416V4000C, KM416V4100C					CMOS DRAM
ABSOLUTE MAXIMUM RATINGS
Parameter	Symbol	Rating				Units
Voltage on any pin relative to VSS	VIN,VOUT	-0.5	to	+4.6		V
Voltage on VCC supply relative to VSS	VCC	-0.5	to	+4.6		V
Storage Temperature	Tstg	-55 to +150				°C
Power Dissipation	PD		1			W
Short Circuit Output Current	IOS Address		50			mA

*Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

RECOMMENDED OPERATING CONDITIONS (Voltage referenced to Vss, T A= 0 to 70°C)

Parameter	Symbol	Min	Typ	Max	Units
Supply Voltage	VCC	3.0	3.3	3.6	V
Ground	VSS	0	0	0	V
Input High Voltage	VIH	2.0	-	VCC+0.3*1	V
Input Low Voltage	VIL	-0.3*2	-	0.8	V

*1 : VCC+1.3V at pulse width ≤15ns which is measured at VCC *2 : -1.3 at pulse width ≤15ns which is measured at VSS

DC AND OPERATING CHARACTERISTICS (Recommended operating conditions unless otherwise noted.)

	Parameter	Symbol	Min	Max	Units
	Input Leakage Current (Any input 0≤VIN≤VCC+0.3V,	II(L)	-5	5	uA
	all other pins not under test=0 Volt)
	Output Leakage Current	IO(L)	-5	5	uA
	(Data out is disabled, 0V≤VOUT≤VCC)
	Output High Voltage Level(IOH=-2mA)	VOH	2.4	-	V
	Output Low Voltage Level(IOL=2mA)	VOL	-	0.4	V