K6R1008C1C-C/C-L, K6R1008C1C-I/C-P |
CMOS SRAM |
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Document Title
128Kx8 Bit High-Speed CMOS Static RAM(5V Operating). Operated at Commercial and Industrial Temperature Ranges.
Revision History
Rev.No. |
History |
Draft Data |
Remark |
Rev. 0.0 |
Initial release with Preliminary. |
Aug. 5. 1998 |
Preliminary |
Rev. 1.0 |
Release to Final Data Sheet. |
Mar. 3. 1999 |
Final |
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1.1. Delete Preliminary. |
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2.2. Added Data Retention Characteristics. |
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Rev. 2.0 |
Add 10ns part. |
Mar. 3. 2000 |
Final |
Rev. 3.0 |
Delete 20ns speed bin |
Sep. 24. 2001 |
Final |
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any questions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
- 1 -
Revision 3.0
September 2001
K6R1008C1C-C/C-L, K6R1008C1C-I/C-P |
CMOS SRAM |
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128K x 8 Bit High-Speed CMOS Static RAM(5.0V Operating)
FEATURES
•Fast Access Time 10,12,15ns(Max.)
•Low Power Dissipation
Standby (TTL) : 30mA(Max.) (CMOS) : 5mA(Max.)
0.5mA(Max.) L-ver. only Operating K6R1008C1C-10 : 80mA(Max.)
K6R1008C1C-12 : 75mA(Max.) K6R1008C1C-15 : 73mA(Max.)
•Single 5.0V±10% Power Supply
•TTL Compatible Inputs and Outputs
•I/O Compatible with 3.3V Device
•Fully Static Operation
- No Clock or Refresh required
•Three State Outputs
•2V Minimum Data Retention: L-ver. only
•Center Power/Ground Pin Configuration
•Standard Pin Configuration
K6R1008C1C-J : 32-SOJ-400
K6R1008C1C-T : 32-TSOP2-400CF
FUNCTIONAL BLOCK DIAGRAM
A0 |
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Clk Gen. |
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Pre-Charge Circuit |
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A1 |
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A2 |
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Select |
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A4 |
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512 Rows |
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A3 |
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Row |
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Memory Array |
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A5 |
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256x8 Columns |
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A6 |
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A7 |
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A8 |
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I/O1~I/O8 |
Data |
I/O Circuit |
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Cont. |
Column Select |
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CLK |
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Gen. |
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A9 |
A10 A11 A12 A13 A14 A15 A16 |
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CS |
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WE |
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OE |
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GENERAL DESCRIPTION
The K6R1008C1C is a 1,048,576-bit high-speed Static Random Access Memory organized as 131,072 words by 8 bits. The K6R1008C1C uses 8 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. The device is fabricated using SAMSUNG′s advanced CMOS process and designed for highspeed circuit technology. It is particularly well suited for use in high-density high-speed system applications. The K6R1008C1C is packaged in a 400mil 32-pin plastic SOJ or TSOP2 forward.
ORDERING INFORMATION
K6R1008C1C-C10/C12/C15 |
Commercial Temp. |
K6R1008C1C-I10/I12/I15 |
Industrial Temp. |
PIN CONFIGURATION(Top View)
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A0 |
1 |
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32 |
A16 |
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A1 |
2 |
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31 |
A15 |
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A2 |
3 |
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30 |
A14 |
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A3 |
4 |
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29 |
A13 |
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CS |
5 |
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28 |
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OE |
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I/O1 |
6 |
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27 |
I/O8 |
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I/O2 |
7 |
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26 |
I/O7 |
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Vcc |
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Vss |
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8 |
SOJ/ |
25 |
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Vss |
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Vcc |
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9 |
TSOP2 |
24 |
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I/O3 |
10 |
23 |
I/O6 |
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I/O4 |
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I/O5 |
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11 |
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22 |
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WE |
12 |
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21 |
A12 |
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A4 |
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A11 |
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13 |
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20 |
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A5 |
14 |
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19 |
A10 |
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A6 |
15 |
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18 |
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A9 |
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A7 |
16 |
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17 |
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A8 |
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PIN FUNCTION
Pin Name |
Pin Function |
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A0 - A16 |
Address Inputs |
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WE |
Write Enable |
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CS |
Chip Select |
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OE |
Output Enable |
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I/O1 ~ I/O8 |
Data Inputs/Outputs |
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VCC |
Power(+5.0V) |
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VSS |
Ground |
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N.C |
No Connection |
- 2 -
Revision 3.0
September 2001
K6R1008C1C-C/C-L, K6R1008C1C-I/C-P |
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CMOS SRAM |
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ABSOLUTE MAXIMUM RATINGS* |
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Parameter |
Symbol |
Rating |
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Unit |
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Voltage on Any Pin Relative to VSS |
VIN, VOUT |
-0.5 to Vcc+0.5V |
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V |
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Voltage on VCC Supply Relative to VSS |
VCC |
-0.5 to 7.0 |
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V |
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Power Dissipation |
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Pd |
1 |
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W |
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Storage Temperature |
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TSTG |
-65 to 150 |
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°C |
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Operating Temperature |
Commercial |
TA |
0 to 70 |
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°C |
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Industrial |
TA |
-40 to 85 |
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°C |
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*Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS*(TA=0 to 70°C)
Parameter |
Symbol |
Min |
Typ |
Max |
Unit |
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Supply Voltage |
VCC |
4.5 |
5.0 |
5.5 |
V |
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Ground |
VSS |
0 |
0 |
0 |
V |
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Input High Voltage |
VIH |
2.2 |
- |
VCC + 0.5*** |
V |
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Input Low Voltage |
VIL |
-0.5** |
- |
0.8 |
V |
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*The above parameters are also guaranteed at industrial temperature range.
**VIL(Min) = -2.0V a.c(Pulse Width ≤ 8ns) for I ≤ 20mA.
***VIH(Max) = VCC + 2.0V a.c (Pulse Width ≤ 8ns) for I ≤ 20mA.
DC AND OPERATING CHARACTERISTICS*(TA=0 to 70°C, Vcc=5.0V±10%, unless otherwise specified)
Parameter |
Symbol |
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Test Conditions |
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Min |
Max |
Unit |
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Input Leakage Current |
ILI |
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VIN = VSS to VCC |
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-2 |
2 |
mA |
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mA |
Output Leakage Current |
ILO |
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CS=VIH or OE=VIH or WE=VIL |
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-2 |
2 |
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VOUT=VSS to VCC |
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Operating Current |
ICC |
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Min. Cycle, 100% Duty |
10ns |
- |
80 |
mA |
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CS=VIL, VIN=VIH or VIL, |
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12ns |
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75 |
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IOUT=0mA |
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15ns |
- |
73 |
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Standby Current |
ISB |
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Min. Cycle, CS=VIH |
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30 |
mA |
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ISB1 |
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f=0MHz, |
CS |
³VCC-0.2V, |
Normal |
- |
5 |
mA |
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VIN³VCC-0.2V or VIN£0.2V |
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L-ver. |
- |
0.5 |
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Output Low Voltage Level |
VOL |
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IOL=8mA |
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0.4 |
V |
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Output High Voltage Level |
VOH |
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IOH=-4mA |
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2.4 |
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V |
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VOH1** |
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IOH1=-0.1mA |
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3.95 |
V |
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*The above parameters are also guaranteed at industrial temperature range.
**VCC=5.0V±5%, Temp.=25°C.
CAPACITANCE*(TA=25°C, f=1.0MHz)
Item |
Symbol |
Test Conditions |
MIN |
Max |
Unit |
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Input/Output Capacitance |
CI/O |
VI/O=0V |
- |
8 |
pF |
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Input Capacitance |
CIN |
VIN=0V |
- |
6 |
pF |
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* Capacitance is sampled and not 100% tested.
- 3 -
Revision 3.0
September 2001